Alexandre Julliard : oleaut32: Fix ARM floating point register allocations.

[Alexandre Julliard]

Module: wine
Branch: master
Commit: b67dc2f4da5012eca29cac7e55889ce895bc55f7
URL:    http://source.winehq.org/git/wine.git/?a=commit;h=b67dc2f4da5012eca29cac7e55...

Author: Alexandre Julliard <julliard(a)winehq.org>
Date:   Fri Dec  8 15:08:57 2017 +0100

oleaut32: Fix ARM floating point register allocations.

Signed-off-by: Alexandre Julliard <julliard(a)winehq.org>

---

 dlls/oleaut32/typelib.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/dlls/oleaut32/typelib.c b/dlls/oleaut32/typelib.c
index 4e72ac0..b56d81f 100644
--- a/dlls/oleaut32/typelib.c
+++ b/dlls/oleaut32/typelib.c
@@ -6867,7 +6867,8 @@ DispCallFunc(
     } regs;
     int rcount;     /* 32-bit register index count */
 #ifndef __SOFTFP__
-    int scount = 0; /* single-precision float register index count (will be incremented twice for doubles, plus alignment) */
+    int scount = 0; /* single-precision float register index count */
+    int dcount = 0; /* double-precision float register index count */
 #endif
 
     TRACE("(%p, %ld, %d, %d, %d, %p, %p, %p (vt=%d))\n",
@@ -6921,15 +6922,13 @@ DispCallFunc(
         case VT_R8:             /* these must be 8-byte aligned, and put in 'd' regs or stack, as they are double-floats */
         case VT_DATE:
 #ifndef __SOFTFP__
-            if (scount < 15)
+            dcount = max( (scount + 1) / 2, dcount );
+            if (dcount < 8)
             {
-                scount += (scount % 2); /* align scount to next whole double */
-                regs.sd.d[scount/2] = V_R8(arg);
-                scount += 2;
+                regs.sd.d[dcount++] = V_R8(arg);
             }
             else
             {
-                scount = 16;                /* Make sure we flag that all 's' regs are full */
                 argspos += (argspos % 2);   /* align argspos to 8-bytes */
                 memcpy( &args[argspos], &V_R8(arg), sizeof(V_R8(arg)) );
                 argspos += sizeof(V_R8(arg)) / sizeof(DWORD);
@@ -6981,6 +6980,7 @@ DispCallFunc(
             break;
         case VT_R4:             /* these must be 4-byte aligned, and put in 's' regs or stack, as they are single-floats */
 #ifndef __SOFTFP__
+            if (!(scount % 2)) scount = max( scount, dcount * 2 );
             if (scount < 16)
                 regs.sd.s[scount++] = V_R4(arg);
             else