On Mon Sep 18 20:09:45 2023 +0000, Giovanni Mascellani wrote:
Hmmm, in my case the VSIR shader passed to the SPIR-V backend is valid and has no instructions outside a block. However, when dealing with unconditional control flow (e.g. a `return` or `break`) inside a loop, the SPIR-V generator outputs, say, `OpReturn`, which terminates the current block, but then goes on outputting any other dead code which appears after that `return` or `break` without opening another block. The generated SPIR-V is thus illegal. I changed it so that after `OpReturn` another dummy SPIR-V block is began and the generated SPIR-V is valid. That's a problem with the SPIR-V code generation, not with VSIR.
Does this issue result from boilerplate code outside of the vsir instruction handlers? Certainly the backend should not emit outside a block if the vsir doesn't, so I wonder if there's a deeper issue here. The dummy block seems like a workaround, not a complete fix.