Personally I think all these sm1-specific lowering passes are not ideal. I would assert that we should just be translating one instruction into multiple instructions when generating the IR. This is simpler than writing HLSL lowering passes, it avoids the need for some basically backend-specific ops like OP3_CMP, and it reduces the amount of backend-specific logic in the core HLSL compiler, or at least moves it closer to the end.
And for things like enum hlsl_base_type, i.e. float vs int/bool, that means we explicitly handle those, probably on a per-instr/per-expr basis, in write_sm1_instructions().
I think I agree, but I don't see how this is actionable in this MR in particular.
I still have in my backlog to introduce vsir between the HLSL->d3dbc translation. I think it may be preferable to write these transformations in a d3dbc-specific vsir pass, which can gradually start absorbing those currently done in HLSL IR (looking at lower_nonfloat_exprs()), than to translate one IR instruction into multiple bytecode instructions, which requires the scaffolding for using additional temporary registers in some cases.