From: Conor McCarthy cmccarthy@codeweavers.com
There is no way to tell in spirv_compiler_emit_load_reg() if the write mask is 64-bit. All loads are 32-bit except for IMMCONST64 and SSA, and the latter ignores the mask, so the only issue lies in spirv_compiler_emit_load_constant64(). Handle these as IMMCONST instead. --- libs/vkd3d-shader/spirv.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/libs/vkd3d-shader/spirv.c b/libs/vkd3d-shader/spirv.c index a3baeea75..73b1a7d66 100644 --- a/libs/vkd3d-shader/spirv.c +++ b/libs/vkd3d-shader/spirv.c @@ -3740,12 +3740,21 @@ static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compile const struct vkd3d_shader_register *reg, uint32_t swizzle, uint32_t write_mask) { unsigned int component_count = vsir_write_mask_component_count(write_mask); + enum vkd3d_data_type data_type = reg->data_type; uint32_t values[VKD3D_VEC4_SIZE] = {0}; unsigned int i, j;
assert(reg->type == VKD3DSPR_IMMCONST);
- if (reg->dimension == VSIR_DIMENSION_SCALAR) + if (data_type_is_64_bit(data_type)) + { + /* SplitDouble bitcast. */ + assert(component_count <= 2); + values[0] = reg->u.immconst_u64[0]; + values[1] = reg->u.immconst_u64[0] >> 32; + data_type = VKD3D_DATA_UINT; + } + else if (reg->dimension == VSIR_DIMENSION_SCALAR) { for (i = 0; i < component_count; ++i) values[i] = *reg->u.immconst_u32; @@ -3760,7 +3769,7 @@ static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compile }
return spirv_compiler_get_constant(compiler, - vkd3d_component_type_from_data_type(reg->data_type), component_count, values); + vkd3d_component_type_from_data_type(data_type), component_count, values); }
static uint32_t spirv_compiler_emit_load_constant64(struct spirv_compiler *compiler,