On Mon Nov 6 14:49:19 2023 +0000, Conor McCarthy wrote:
With a `bitcast` instruction we may be able to do without the implicit bitcast available for other register types, but I need to check.
In the current `sm6_rebase` branch we can cover all cases with a `bitcast` instruction, but I think that's the wrong approach for a couple of reasons.
TPF and therefore VSIR have no `bitcast` instruction because the register mechanism enables bitcasting to be done without one. Introducing a `bitcast` instruction would add complexity to the IR and create two pathways to the same result.
While we currently don't need bitcast support for SSA registers, there's no guarantee a need for it won't arise in the future. Then the change made in this patch would become necessary anyway.