[PATCH v12 4/4] vkd3d-shader/dxil: Support 16-bit types.

[Conor McCarthy]

From: Conor McCarthy

---
 libs/vkd3d-shader/dxil.c                 | 11 +++++++++--
 tests/hlsl/minimum-precision.shader_test | 16 +++++++++++++---
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/libs/vkd3d-shader/dxil.c b/libs/vkd3d-shader/dxil.c
index ba951a6e5..2bd267709 100644
--- a/libs/vkd3d-shader/dxil.c
+++ b/libs/vkd3d-shader/dxil.c
@@ -2148,6 +2148,8 @@ static enum vkd3d_data_type vkd3d_data_type_from_sm6_type(const struct sm6_type
                 return VKD3D_DATA_BOOL;
             case 8:
                 return VKD3D_DATA_UINT8;
+            case 16:
+                return VKD3D_DATA_UINT16;
             case 32:
                 return VKD3D_DATA_UINT;
             case 64:
@@ -2161,6 +2163,8 @@ static enum vkd3d_data_type vkd3d_data_type_from_sm6_type(const struct sm6_type
     {
         switch (type->u.width)
         {
+            case 16:
+                return VKD3D_DATA_HALF;
             case 32:
                 return VKD3D_DATA_FLOAT;
             case 64:
@@ -2756,7 +2760,7 @@ static enum vkd3d_result sm6_parser_constants_init(struct sm6_parser *sm6, const
                 }

if (type->u.width == 16)
-                    FIXME("Half float type is not supported yet.\n");
+                    dst->u.reg.u.immconst_u32[0] = record->operands[0];
                 else if (type->u.width == 32)
                     dst->u.reg.u.immconst_f32[0] = bitcast_uint64_to_float(record->operands[0]);
                 else if (type->u.width == 64)
@@ -4426,7 +4430,10 @@ static enum vkd3d_shader_opcode sm6_map_cast_op(uint64_t code, const struct sm6_
             break;
         case CAST_ZEXT:
         case CAST_SEXT:
-            /* nop or min precision. TODO: native 16-bit */
+            /* nop or min precision. TODO: native 16-bit.
+             * Extension instructions could be emitted for min precision, but in Windows
+             * the AMD RX 580 simply drops such instructions, which makes sense as no
+             * assumptions should be made about any behaviour which depends on bit width. */
             if (to->u.width == from->u.width || (to->u.width == 32 && from->u.width == 16))
             {
                 op = VKD3DSIH_NOP;
diff --git a/tests/hlsl/minimum-precision.shader_test b/tests/hlsl/minimum-precision.shader_test
index 773b2b393..f8d4eb252 100644
--- a/tests/hlsl/minimum-precision.shader_test
+++ b/tests/hlsl/minimum-precision.shader_test
@@ -30,16 +30,26 @@ uint4 main() : sv_target
     return uint4(u.x + i, u.y + j, 0, 0);
 }

+[require]
+shader model >= 4.0
+shader model < 6.0
+
 [test]
 uniform 0 uint4 0 0 0 0
 draw quad
 probe all rgbaui (0x7fff, 0xffff, 0, 0)

+[require]
+shader model >= 6.0
+
+[test]
+uniform 0 uint4 0 0 0 0
+draw quad
+probe all rgbaui (0x7fff, 0xffffffff, 0, 0)
+

% The code d3dcompiler_47 produces for this appears correct, but the result
 % is still zero in Windows.
-[require]
-shader model >= 6.0

[pixel shader]
 uniform min16uint4 u;
@@ -55,7 +65,7 @@ uint4 main() : sv_target
 uniform 0 uint4 0 0 0 0
 uniform 4 uint 2
 draw quad
-probe all rgbaui (0x7fff, 0xffff, 0, 0)
+probe all rgbaui (0x7fff, 0xffffffff, 0, 0)
 uniform 0 uint4 0 0 0 0
 uniform 4 uint 0
 draw quad