From: Conor McCarthy cmccarthy@codeweavers.com
--- libs/vkd3d-shader/d3d_asm.c | 12 ++ libs/vkd3d-shader/dxil.c | 245 +++++++++++++++++++++-- libs/vkd3d-shader/ir.c | 20 ++ libs/vkd3d-shader/spirv.c | 7 +- libs/vkd3d-shader/vkd3d_shader_private.h | 9 + 5 files changed, 278 insertions(+), 15 deletions(-)
diff --git a/libs/vkd3d-shader/d3d_asm.c b/libs/vkd3d-shader/d3d_asm.c index 61500dcc7..4934c7b38 100644 --- a/libs/vkd3d-shader/d3d_asm.c +++ b/libs/vkd3d-shader/d3d_asm.c @@ -242,6 +242,7 @@ static const char * const shader_opcode_names[] = [VKD3DSIH_NRM ] = "nrm", [VKD3DSIH_OR ] = "or", [VKD3DSIH_PHASE ] = "phase", + [VKD3DSIH_PHI ] = "phi", [VKD3DSIH_POW ] = "pow", [VKD3DSIH_RCP ] = "rcp", [VKD3DSIH_REP ] = "rep", @@ -1874,6 +1875,17 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, shader_print_bool_literal(compiler, " = ", ins->src[0].reg.u.immconst_uint[0], ""); break;
+ case VKD3DSIH_PHI: + vkd3d_string_buffer_printf(buffer, " "); + shader_dump_dst_param(compiler, ins->dst, false); + for (i = 0; i < ins->src_count; ++i) + { + vkd3d_string_buffer_printf(buffer, ", ["); + shader_dump_src_param(compiler, &ins->src[i]); + shader_print_uint_literal(compiler, ", l", ins->src[i].reg.u.block_id, "]"); + } + break; + default: shader_dump_instruction_flags(compiler, ins);
diff --git a/libs/vkd3d-shader/dxil.c b/libs/vkd3d-shader/dxil.c index cdc505067..92d73ccea 100644 --- a/libs/vkd3d-shader/dxil.c +++ b/libs/vkd3d-shader/dxil.c @@ -448,6 +448,20 @@ struct sm6_symbol const char *name; };
+struct incoming_value +{ + struct sm6_block *block; + struct vkd3d_shader_register reg; +}; + +struct sm6_phi +{ + struct vkd3d_shader_register reg; + struct incoming_value *incoming; + size_t incoming_capacity; + size_t incoming_count; +}; + enum sm6_block_terminator_type { TERMINATOR_UNCOND_BR, @@ -471,6 +485,10 @@ struct sm6_block
unsigned int synthetic_id;
+ struct sm6_phi *phi; + size_t phi_capacity; + size_t phi_count; + struct sm6_block_terminator terminator; };
@@ -1926,6 +1944,11 @@ static bool sm6_value_is_icb(const struct sm6_value *value) return value->value_type == VALUE_TYPE_ICB; }
+static bool sm6_value_is_ssa(const struct sm6_value *value) +{ + return sm6_value_is_register(value) && register_is_ssa(&value->u.reg); +} + static inline unsigned int sm6_value_get_constant_uint(const struct sm6_value *value) { if (!sm6_value_is_constant(value)) @@ -3012,6 +3035,26 @@ static struct sm6_block *sm6_block_create() return block; }
+static struct sm6_phi *sm6_block_phi_require_space(struct sm6_block *block, struct sm6_parser *sm6) +{ + struct sm6_phi *phi; + + if (!vkd3d_array_reserve((void **)&block->phi, &block->phi_capacity, block->phi_count + 1, sizeof(*block->phi))) + { + ERR("Failed to allocate phi array.\n"); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, + "Out of memory allocating a phi instruction."); + return NULL; + } + phi = &block->phi[block->phi_count++]; + + phi->incoming = NULL; + phi->incoming_capacity = 0; + phi->incoming_count = 0; + + return phi; +} + static enum vkd3d_shader_opcode map_binary_op(uint64_t code, const struct sm6_type *type_a, const struct sm6_type *type_b, struct sm6_parser *sm6) { @@ -4136,6 +4179,82 @@ static void sm6_parser_emit_load(struct sm6_parser *sm6, const struct dxil_recor instruction_dst_param_init_ssa_scalar(ins, sm6); }
+static void sm6_parser_emit_phi(struct sm6_parser *sm6, const struct dxil_record *record, + struct sm6_function *function, struct sm6_block *code_block, struct vkd3d_shader_instruction *ins, + struct sm6_value *dst) +{ + const struct sm6_type *type; + const struct sm6_value *src; + struct sm6_phi *phi; + unsigned int i, j; + uint64_t src_idx; + + if (record->operand_count < 3 || !(record->operand_count & 1)) + { + WARN("Invalid operand count %u.\n", record->operand_count); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND_COUNT, + "Invalid operand count %u for phi instruction.", record->operand_count); + return; + } + + if (!(type = sm6_parser_get_type(sm6, record->operands[0]))) + return; + if (!sm6_type_is_numeric(type)) + { + /* dxc doesn't seem to use buffer/resource read return types here. */ + FIXME("Only scalar numeric types are supported.\n"); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND_COUNT, + "Result type class %u of a phi instruction is not scalar numeric.", type->class); + return; + } + + dst->type = type; + register_init_ssa_scalar(&dst->u.reg, type, sm6); + + if (!(phi = sm6_block_phi_require_space(code_block, sm6))) + return; + phi->reg = dst->u.reg; + phi->incoming_count = record->operand_count / 2u; + + if (!vkd3d_array_reserve((void **)&phi->incoming, &phi->incoming_capacity, phi->incoming_count, + sizeof(phi->incoming[0]))) + { + ERR("Failed to allocate phi incoming array.\n"); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, + "Out of memory allocating a phi incoming array."); + return; + } + + for (i = 1; i < record->operand_count; i += 2) + { + src_idx = sm6->value_count - decode_rotated_signed_value(record->operands[i]); + if (src_idx >= sm6->cur_max_value) + { + FIXME("Invalid value index %"PRIu64".\n", src_idx); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND, + "Invalid value index %"PRIu64" for a phi incoming value.", src_idx); + return; + } + + /* May be a forward reference. */ + src = &sm6->values[src_idx]; + if (src->type && src->type != type) + { + WARN("Type mismatch.\n"); + vkd3d_shader_parser_warning(&sm6->p, VKD3D_SHADER_WARNING_DXIL_TYPE_MISMATCH, + "The type of a phi incoming value does not match the result type."); + } + + j = i / 2u; + /* Store the value index in the register for later resolution. */ + phi->incoming[j].reg.idx[0].offset = src_idx; + if (!(phi->incoming[j].block = sm6_function_get_block(function, record->operands[i + 1], sm6))) + return; + } + + ins->handler_idx = VKD3DSIH_NOP; +} + static void sm6_parser_emit_ret(struct sm6_parser *sm6, const struct dxil_record *record, struct sm6_block *code_block, struct vkd3d_shader_instruction *ins) { @@ -4271,7 +4390,7 @@ static enum vkd3d_result sm6_parser_function_init(struct sm6_parser *sm6, const struct sm6_function *function) { struct vkd3d_shader_instruction *ins; - size_t i, block_idx, block_count; + size_t i, j, block_idx, block_count; const struct dxil_record *record; bool ret_found, is_terminator; struct sm6_block *code_block; @@ -4381,6 +4500,9 @@ static enum vkd3d_result sm6_parser_function_init(struct sm6_parser *sm6, const case FUNC_CODE_INST_LOAD: sm6_parser_emit_load(sm6, record, ins, dst); break; + case FUNC_CODE_INST_PHI: + sm6_parser_emit_phi(sm6, record, function, code_block, ins, dst); + break; case FUNC_CODE_INST_RET: sm6_parser_emit_ret(sm6, record, code_block, ins); is_terminator = true; @@ -4417,6 +4539,30 @@ static enum vkd3d_result sm6_parser_function_init(struct sm6_parser *sm6, const return VKD3D_ERROR_INVALID_SHADER; }
+ for (block_idx = 0; block_idx < function->block_count; ++block_idx) + { + code_block = function->blocks[block_idx]; + + for (i = 0; i < code_block->phi_count; ++i) + { + struct sm6_phi *phi = &code_block->phi[i]; + struct sm6_value *src; + + for (j = 0; j < phi->incoming_count; ++j) + { + src = &sm6->values[phi->incoming[j].reg.idx[0].offset]; + if (!sm6_value_is_constant(src) && !sm6_value_is_undef(src) && !sm6_value_is_ssa(src)) + { + FIXME("PHI incoming value is not a constant or SSA register.\n"); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND, + "A PHI incoming value is not a constant or SSA register."); + return VKD3D_ERROR_INVALID_SHADER; + } + phi->incoming[j].reg = src->u.reg; + } + } + } + return VKD3D_OK; }
@@ -4456,19 +4602,50 @@ static void sm6_block_emit_terminator(struct sm6_block *block, struct sm6_parser } }
-static bool sm6_block_emit_instructions(struct sm6_block *block, struct sm6_parser *sm6) +static void sm6_block_emit_phi(struct sm6_block *block, struct sm6_parser *sm6) { - struct vkd3d_shader_instruction *ins = sm6_parser_require_space(sm6, block->instruction_count + 1); + struct vkd3d_shader_instruction *ins; + unsigned int i, j, incoming_count; + const struct sm6_phi *src_phi;
- if (!ins) - return false; + sm6_parser_require_space(sm6, block->phi_count); + + for (i = 0; i < block->phi_count; ++i) + { + struct vkd3d_shader_src_param *src_params; + struct vkd3d_shader_dst_param *dst_param; + + src_phi = &block->phi[i]; + if (!(incoming_count = src_phi->incoming_count)) + continue; + assert(incoming_count > 1); + + ins = sm6_parser_add_instruction(sm6, VKD3DSIH_PHI); + if (!(src_params = instruction_src_params_alloc(ins, incoming_count, sm6))) + return; + if (!(dst_param = instruction_dst_params_alloc(ins, 1, sm6))) + return; + + for (j = 0; j < incoming_count; ++j) + { + src_param_init(&src_params[j]); + src_params[j].reg = src_phi->incoming[j].reg; + src_params[j].reg.u.block_id = src_phi->incoming[j].block->synthetic_id; + } + + dst_param_init(dst_param); + dst_param->reg = src_phi->reg; + } +} + +static void sm6_block_emit_instructions(struct sm6_block *block, struct sm6_parser *sm6) +{ + struct vkd3d_shader_instruction *ins = sm6_parser_require_space(sm6, block->instruction_count + 1);
memcpy(ins, block->instructions, block->instruction_count * sizeof(*block->instructions)); sm6->p.instructions.count += block->instruction_count;
sm6_block_emit_terminator(block, sm6); - - return true; }
static enum vkd3d_result sm6_parser_module_init(struct sm6_parser *sm6, const struct dxil_block *block, @@ -4526,6 +4703,51 @@ static enum vkd3d_result sm6_parser_module_init(struct sm6_parser *sm6, const st return VKD3D_OK; }
+static void sm6_parser_emit_label(struct sm6_parser *sm6, unsigned int label_id) +{ + struct vkd3d_shader_instruction *ins; + + ins = sm6_parser_require_space(sm6, 1); + vsir_instruction_init_label(ins, &sm6->p.location, label_id, &sm6->p); + ++sm6->p.instructions.count; +} + +static void sm6_parser_emit_branch(struct sm6_parser *sm6, unsigned int block_idx) +{ + struct vkd3d_shader_instruction *ins; + + ins = sm6_parser_add_instruction(sm6, VKD3DSIH_BRANCH); + ins->declaration.branch.true_id = block_idx; + ins->declaration.branch.false_id = 0; +} + +static enum vkd3d_result sm6_function_emit_blocks(struct sm6_function *function, struct sm6_parser *sm6) +{ + unsigned int i; + + for (i = 0; i < function->block_count; ++i) + { + struct sm6_block *block = function->blocks[i]; + + if (!sm6_parser_require_space(sm6, block->instruction_count + !i + 3)) + { + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, + "Out of memory emitting shader instructions."); + return VKD3D_ERROR_OUT_OF_MEMORY; + } + if (function->block_count > 1) + { + if (!i) + sm6_parser_emit_branch(sm6, block->synthetic_id); + sm6_parser_emit_label(sm6, block->synthetic_id); + sm6_block_emit_phi(block, sm6); + } + sm6_block_emit_instructions(block, sm6); + } + + return VKD3D_OK; +} + static bool sm6_parser_allocate_named_metadata(struct sm6_parser *sm6) { struct dxil_block *block; @@ -5888,13 +6110,8 @@ static enum vkd3d_result sm6_parser_init(struct sm6_parser *sm6, const uint32_t return VKD3D_ERROR_INVALID_SHADER; }
- assert(sm6->function_count == 1); - if (!sm6_block_emit_instructions(fn->blocks[0], sm6)) - { - vkd3d_shader_error(message_context, &location, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, - "Out of memory emitting shader instructions."); - return VKD3D_ERROR_OUT_OF_MEMORY; - } + if ((ret = sm6_function_emit_blocks(fn, sm6)) < 0) + return ret;
dxil_block_destroy(&sm6->root_block);
diff --git a/libs/vkd3d-shader/ir.c b/libs/vkd3d-shader/ir.c index acdb660ea..bf2b0d3d3 100644 --- a/libs/vkd3d-shader/ir.c +++ b/libs/vkd3d-shader/ir.c @@ -320,6 +320,26 @@ void vsir_instruction_init(struct vkd3d_shader_instruction *ins, const struct vk ins->handler_idx = handler_idx; }
+bool vsir_instruction_init_label(struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_location *location, + unsigned int label_id, void *parser) +{ + struct vkd3d_shader_src_param *src_param; + + if (!(src_param = shader_parser_get_src_params(parser, 1))) + return false; + + vsir_register_init(&src_param->reg, VKD3DSPR_LABEL, VKD3D_DATA_UINT, 1); + src_param->reg.idx[0].offset = label_id; + src_param->swizzle = 0; + src_param->modifiers = 0; + + vsir_instruction_init(ins, location, VKD3DSIH_LABEL); + ins->src = src_param; + ins->src_count = 1; + + return true; +} + static enum vkd3d_result instruction_array_flatten_hull_shader_phases(struct vkd3d_shader_instruction_array *src_instructions) { struct hull_flattener flattener = {*src_instructions}; diff --git a/libs/vkd3d-shader/spirv.c b/libs/vkd3d-shader/spirv.c index be149a0cf..d57f561aa 100644 --- a/libs/vkd3d-shader/spirv.c +++ b/libs/vkd3d-shader/spirv.c @@ -3785,7 +3785,12 @@ static uint32_t spirv_compiler_emit_load_ssa_reg(struct spirv_compiler *compiler
ssa = spirv_compiler_get_ssa_register_info(compiler, reg); val_id = ssa->id; - assert(val_id); + if (!val_id) + { + /* Should be a missing instruction implementation. */ + assert(compiler->failed); + return 0; + } assert(vkd3d_swizzle_is_scalar(swizzle));
if (reg->dimension == VSIR_DIMENSION_SCALAR) diff --git a/libs/vkd3d-shader/vkd3d_shader_private.h b/libs/vkd3d-shader/vkd3d_shader_private.h index 24f7c1230..28409e635 100644 --- a/libs/vkd3d-shader/vkd3d_shader_private.h +++ b/libs/vkd3d-shader/vkd3d_shader_private.h @@ -433,6 +433,7 @@ enum vkd3d_shader_opcode VKD3DSIH_NRM, VKD3DSIH_OR, VKD3DSIH_PHASE, + VKD3DSIH_PHI, VKD3DSIH_POW, VKD3DSIH_RCP, VKD3DSIH_REP, @@ -837,6 +838,7 @@ struct vkd3d_shader_register uint64_t immconst_uint64[VKD3D_DVEC2_SIZE]; double immconst_double[VKD3D_DVEC2_SIZE]; unsigned fp_body_idx; + unsigned int block_id; } u; };
@@ -1163,6 +1165,8 @@ static inline bool vkd3d_shader_ver_le(const struct vkd3d_shader_version *v, uns
void vsir_instruction_init(struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_location *location, enum vkd3d_shader_opcode handler_idx); +bool vsir_instruction_init_label(struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_location *location, + unsigned int label_id, void *parser);
static inline bool vkd3d_shader_instruction_has_texel_offset(const struct vkd3d_shader_instruction *ins) { @@ -1174,6 +1178,11 @@ static inline bool register_is_constant(const struct vkd3d_shader_register *reg) return (reg->type == VKD3DSPR_IMMCONST || reg->type == VKD3DSPR_IMMCONST64); }
+static inline bool register_is_ssa(const struct vkd3d_shader_register *reg) +{ + return reg->type == VKD3DSPR_SSA; +} + struct vkd3d_shader_param_node { struct vkd3d_shader_param_node *next;