From: Francisco Casas fcasas@codeweavers.com
So far, for every register type we write we only use a single dimension type. The only exception being the sampler register for gather instructions, where the register dimension must be VEC4 (and the swizzle_type SCALAR) instead of NONE.
To get rid of sm4_src_register.dim, we need a way to handle this nasty exception, which is provided by this patch. --- libs/vkd3d-shader/tpf.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c index c817d988..ef442907 100644 --- a/libs/vkd3d-shader/tpf.c +++ b/libs/vkd3d-shader/tpf.c @@ -1206,6 +1206,7 @@ static void shader_sm5_read_sync(struct vkd3d_shader_instruction *ins, uint32_t * O -> VKD3D_DATA_OPAQUE * R -> VKD3D_DATA_RESOURCE * S -> VKD3D_DATA_SAMPLER + * s -> VKD3D_DATA_SAMPLER with scalar swizzle * U -> VKD3D_DATA_UAV */ static const struct vkd3d_sm4_opcode_info opcode_table[] = @@ -1337,7 +1338,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] = {VKD3D_SM4_OP_DCL_GLOBAL_FLAGS, VKD3DSIH_DCL_GLOBAL_FLAGS, "", "", shader_sm4_read_dcl_global_flags}, {VKD3D_SM4_OP_LOD, VKD3DSIH_LOD, "f", "fRS"}, - {VKD3D_SM4_OP_GATHER4, VKD3DSIH_GATHER4, "u", "fRS"}, + {VKD3D_SM4_OP_GATHER4, VKD3DSIH_GATHER4, "u", "fRs"}, {VKD3D_SM4_OP_SAMPLE_POS, VKD3DSIH_SAMPLE_POS, "f", "Ru"}, {VKD3D_SM4_OP_SAMPLE_INFO, VKD3DSIH_SAMPLE_INFO, "f", "R"}, {VKD3D_SM5_OP_HS_DECLS, VKD3DSIH_HS_DECLS, "", ""}, @@ -1353,9 +1354,9 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] = {VKD3D_SM5_OP_DERIV_RTX_FINE, VKD3DSIH_DSX_FINE, "f", "f"}, {VKD3D_SM5_OP_DERIV_RTY_COARSE, VKD3DSIH_DSY_COARSE, "f", "f"}, {VKD3D_SM5_OP_DERIV_RTY_FINE, VKD3DSIH_DSY_FINE, "f", "f"}, - {VKD3D_SM5_OP_GATHER4_C, VKD3DSIH_GATHER4_C, "f", "fRSf"}, - {VKD3D_SM5_OP_GATHER4_PO, VKD3DSIH_GATHER4_PO, "f", "fiRS"}, - {VKD3D_SM5_OP_GATHER4_PO_C, VKD3DSIH_GATHER4_PO_C, "f", "fiRSf"}, + {VKD3D_SM5_OP_GATHER4_C, VKD3DSIH_GATHER4_C, "f", "fRsf"}, + {VKD3D_SM5_OP_GATHER4_PO, VKD3DSIH_GATHER4_PO, "f", "fiRs"}, + {VKD3D_SM5_OP_GATHER4_PO_C, VKD3DSIH_GATHER4_PO_C, "f", "fiRsf"}, {VKD3D_SM5_OP_RCP, VKD3DSIH_RCP, "f", "f"}, {VKD3D_SM5_OP_F32TOF16, VKD3DSIH_F32TOF16, "u", "f"}, {VKD3D_SM5_OP_F16TOF32, VKD3DSIH_F16TOF32, "f", "u"}, @@ -1628,6 +1629,7 @@ static enum vkd3d_data_type map_data_type(char t) case 'R': return VKD3D_DATA_RESOURCE; case 'S': + case 's': return VKD3D_DATA_SAMPLER; case 'U': return VKD3D_DATA_UAV; @@ -3729,7 +3731,8 @@ static void sm4_src_from_node(struct sm4_src_register *src, src->swizzle = hlsl_map_swizzle(hlsl_swizzle_from_writemask(writemask), map_writemask); }
-static void sm4_write_dst_register(const struct tpf_writer *tpf, const struct sm4_dst_register *dst) +static void sm4_write_dst_register(const struct tpf_writer *tpf, const struct sm4_dst_register *dst, + char dst_info) { const struct vkd3d_sm4_register_type_info *register_type_info; struct vkd3d_bytecode_buffer *buffer = tpf->buffer; @@ -3764,7 +3767,7 @@ static void sm4_write_dst_register(const struct tpf_writer *tpf, const struct sm } }
-static void sm4_write_src_register(const struct tpf_writer *tpf, const struct sm4_src_register *src) +static void sm4_write_src_register(const struct tpf_writer *tpf, const struct sm4_src_register *src, char src_info) { const struct vkd3d_sm4_register_type_info *register_type_info; struct vkd3d_bytecode_buffer *buffer = tpf->buffer; @@ -3784,6 +3787,8 @@ static void sm4_write_src_register(const struct tpf_writer *tpf, const struct sm }
reg_dim = src->reg.dim; + if (src_info == 's') + reg_dim = VKD3D_SM4_DIMENSION_VEC4;
token |= sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT; token |= src->reg.idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT; @@ -3832,6 +3837,7 @@ static uint32_t sm4_register_order(const struct sm4_register *reg)
static void write_sm4_instruction(const struct tpf_writer *tpf, const struct sm4_instruction *instr) { + const struct vkd3d_sm4_opcode_info *opcode_info = get_opcode_info(instr->opcode); struct vkd3d_bytecode_buffer *buffer = tpf->buffer; uint32_t token = instr->opcode; unsigned int size = 1, i, j; @@ -3860,10 +3866,10 @@ static void write_sm4_instruction(const struct tpf_writer *tpf, const struct sm4 }
for (i = 0; i < instr->dst_count; ++i) - sm4_write_dst_register(tpf, &instr->dsts[i]); + sm4_write_dst_register(tpf, &instr->dsts[i], opcode_info ? opcode_info->dst_info[i] : ' ');
for (i = 0; i < instr->src_count; ++i) - sm4_write_src_register(tpf, &instr->srcs[i]); + sm4_write_src_register(tpf, &instr->srcs[i], opcode_info ? opcode_info->src_info[i] : ' ');
if (instr->byte_stride) put_u32(buffer, instr->byte_stride); @@ -5151,7 +5157,6 @@ static void write_sm4_gather(const struct tpf_writer *tpf, const struct hlsl_ir_
src = &instr.srcs[instr.src_count++]; sm4_src_from_deref(tpf->ctx, src, sampler, VKD3DSP_WRITEMASK_ALL); - src->reg.dim = VKD3D_SM4_DIMENSION_VEC4; src->swizzle_type = VKD3D_SM4_SWIZZLE_SCALAR; src->swizzle = swizzle;