From: Conor McCarthy cmccarthy@codeweavers.com
--- libs/vkd3d-shader/dxil.c | 26 ++++++++++++++++++++++++++ tests/hlsl/cast-64-bit.shader_test | 2 +- 2 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/libs/vkd3d-shader/dxil.c b/libs/vkd3d-shader/dxil.c index c089d132c..ade3b82ac 100644 --- a/libs/vkd3d-shader/dxil.c +++ b/libs/vkd3d-shader/dxil.c @@ -358,6 +358,7 @@ enum dx_intrinsic_opcode DX_DERIV_COARSEY = 84, DX_DERIV_FINEX = 85, DX_DERIV_FINEY = 86, + DX_SPLIT_DOUBLE = 102, DX_LEGACY_F32TOF16 = 130, DX_LEGACY_F16TOF32 = 131, }; @@ -1722,6 +1723,11 @@ static bool sm6_type_is_f16_f32(const struct sm6_type *type) return type->class == TYPE_CLASS_FLOAT && (type->u.width == 16 || type->u.width == 32); }
+static bool sm6_type_is_double(const struct sm6_type *type) +{ + return type->class == TYPE_CLASS_FLOAT && type->u.width == 64; +} + static inline bool sm6_type_is_floating_point(const struct sm6_type *type) { return type->class == TYPE_CLASS_FLOAT; @@ -3752,6 +3758,19 @@ static void sm6_parser_emit_dx_buffer_load(struct sm6_parser *sm6, enum dx_intri instruction_dst_param_init_ssa_vector(ins, VKD3D_VEC4_SIZE, sm6); }
+static void sm6_parser_emit_dx_split_double(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, + const struct sm6_value **operands, struct function_emission_state *state) +{ + struct vkd3d_shader_instruction *ins = state->ins; + struct vkd3d_shader_src_param *src_param; + + vsir_instruction_init(ins, &sm6->p.location, VKD3DSIH_MOV); + src_param = instruction_src_params_alloc(ins, 1, sm6); + src_param_init_from_value(src_param, operands[0]); + + instruction_dst_param_init_ssa_vector(ins, 2, sm6); +} + static void sm6_parser_emit_dx_store_output(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, const struct sm6_value **operands, struct function_emission_state *state) { @@ -3822,9 +3841,11 @@ struct sm6_dx_opcode_info i -> int32 m -> int16/32/64 f -> float + d -> double e -> half/float g -> half/float/double H -> handle + S -> splitdouble v -> void o -> overloaded R -> matches the return type @@ -3861,6 +3882,7 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] = [DX_ROUND_PI ] = {"g", "R", sm6_parser_emit_dx_unary}, [DX_ROUND_Z ] = {"g", "R", sm6_parser_emit_dx_unary}, [DX_RSQRT ] = {"g", "R", sm6_parser_emit_dx_unary}, + [DX_SPLIT_DOUBLE ] = {"S", "d", sm6_parser_emit_dx_split_double}, [DX_SQRT ] = {"g", "R", sm6_parser_emit_dx_unary}, [DX_STORE_OUTPUT ] = {"v", "ii8o", sm6_parser_emit_dx_store_output}, [DX_UMAX ] = {"m", "RR", sm6_parser_emit_dx_binary}, @@ -3895,12 +3917,16 @@ static bool sm6_parser_validate_operand_type(struct sm6_parser *sm6, const struc return sm6_type_is_i16_i32_i64(type); case 'f': return sm6_type_is_float(type); + case 'd': + return sm6_type_is_double(type); case 'e': return sm6_type_is_f16_f32(type); case 'g': return sm6_type_is_floating_point(type); case 'H': return (is_return || sm6_value_is_handle(value)) && type == sm6->handle_type; + case 'S': + return sm6_type_is_struct(type) && !strcmp(type->u.struc->name, "dx.types.splitdouble"); case 'v': return !type; case 'o': diff --git a/tests/hlsl/cast-64-bit.shader_test b/tests/hlsl/cast-64-bit.shader_test index efdf92632..1e33d8112 100644 --- a/tests/hlsl/cast-64-bit.shader_test +++ b/tests/hlsl/cast-64-bit.shader_test @@ -32,7 +32,7 @@ uint4 main() : sv_target
[test] uniform 0 double2 -4.5 8.500003814697266 -todo draw quad +todo(sm<6) draw quad probe all rgbaui (0, 0xc0120000, 0x80000000, 0x40210000)