https://bugs.winehq.org/show_bug.cgi?id=57019
Bug ID: 57019 Summary: wineboot crashes in create_bios_processor_values() on 2013 Mac Pro Product: Wine Version: 9.14 Hardware: x86-64 OS: MacOS Status: UNCONFIRMED Severity: normal Priority: P2 Component: programs Assignee: wine-bugs@winehq.org Reporter: bshanks@codeweavers.com Regression SHA1: ecbc4cf06d6c9253ba92065f320ddd6eeff3177f
Created attachment 76864 --> https://bugs.winehq.org/attachment.cgi?id=76864 wineboot backtrace
Since ecbc4cf06d6c9253ba92065f320ddd6eeff3177f ("wineboot: Retrieve CPU details through the SMBIOS table."), wineboot assumes that an SMBIOS 3.0+ processor information table is present, and uses those values to populate CPU info in the registry.
On most platforms, raw SMBIOS tables are not available to unprivileged applications, so ntdll "creates" SMBIOS tables with information from other APIs. ntdll creates a v3.0+ processor table, and wineboot is happy.
However, on Intel macOS, raw SMBIOS tables are available to unprivileged applications, and ntdll passes them straight through to wineboot. My 2013 Mac Pro (running macOS 10.13 and the latest 2023 EFI firmware) only supports SMBIOS v2.4, and the processor information table is missing all the 2.5+ fields like core/thread count. These fields are filled with garbage, and wineboot crashes when proc->thread_count2 is implausibly large.
One fix for this would be for wineboot to not use SMBIOS for CPU details (or at least have a non-SMBIOS fallback). Alternately, ntdll could disable passthrough of real SMBIOS tables and just create it on all platforms (this is already done on ARM64 macOS).
dmidecode output showing the processor information table: $ dmidecode # dmidecode 3.1 Getting SMBIOS data from Apple SMBIOS service. SMBIOS 2.4 present. 68 structures occupying 3524 bytes.
Bad address Handle 0x0000, DMI type 4, 35 bytes Processor Information Socket Designation: Not Specified Type: Central Processor Family: Pentium 4 Manufacturer: Intel(R) Corporation ID: E4 06 03 00 FF FB EB BF Signature: Type 0, Family 6, Model 62, Stepping 4 Flags: FPU (Floating-point unit on-chip) VME (Virtual mode extension) DE (Debugging extension) PSE (Page size extension) TSC (Time stamp counter) MSR (Model specific registers) PAE (Physical address extension) MCE (Machine check exception) CX8 (CMPXCHG8 instruction supported) APIC (On-chip APIC hardware supported) SEP (Fast system call) MTRR (Memory type range registers) PGE (Page global enable) MCA (Machine check architecture) CMOV (Conditional move instruction supported) PAT (Page attribute table) PSE-36 (36-bit page size extension) CLFSH (CLFLUSH instruction supported) DS (Debug store) ACPI (ACPI supported) MMX (MMX technology supported) FXSR (FXSAVE and FXSTOR instructions supported) SSE (Streaming SIMD extensions) SSE2 (Streaming SIMD extensions 2) SS (Self-snoop) HTT (Multi-threading) TM (Thermal monitor supported) PBE (Pending break enabled) Version: Intel(R) Xeon(R) CPU E5-1620 v2 @ 3.70GHz Voltage: 1.2 V External Clock: 25 MHz Max Speed: 3700 MHz Current Speed: 3700 MHz Status: Populated, Enabled Upgrade: ZIF Socket L1 Cache Handle: 0x0002 L2 Cache Handle: 0x0003 L3 Cache Handle: 0x0004 Serial Number: Not Specified Asset Tag: Not Specified Part Number: Not Specified