Module: wine Branch: master Commit: ccaeb3ed834f99e5c818c7d3da47abba8d632de8 URL: http://source.winehq.org/git/wine.git/?a=commit;h=ccaeb3ed834f99e5c818c7d3da...
Author: André Hentschel webmaster@dawncrow.de Date: Sat Sep 18 18:03:56 2010 +0200
server: Add ARM support.
---
include/wine/server_protocol.h | 6 ++++-- server/protocol.def | 4 +++- server/thread.c | 6 ++++++ server/trace.c | 8 ++++++++ 4 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/include/wine/server_protocol.h b/include/wine/server_protocol.h index b699956..4c5bc6e 100644 --- a/include/wine/server_protocol.h +++ b/include/wine/server_protocol.h @@ -129,7 +129,7 @@ typedef union
enum cpu_type { - CPU_x86, CPU_x86_64, CPU_ALPHA, CPU_POWERPC, CPU_SPARC + CPU_x86, CPU_x86_64, CPU_ALPHA, CPU_POWERPC, CPU_ARM, CPU_SPARC }; typedef int cpu_type_t;
@@ -146,6 +146,7 @@ typedef struct struct { unsigned __int64 fir; unsigned int psr, __pad; } alpha_regs; struct { unsigned int iar, msr, ctr, lr, dar, dsisr, trap, __pad; } powerpc_regs; + struct { unsigned int sp, lr, pc, cpsr; } arm_regs; struct { unsigned int psr, pc, npc, y, wim, tbr; } sparc_regs; } ctl; union @@ -156,6 +157,7 @@ typedef struct struct { unsigned __int64 v0, t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, s0, s1, s2, s3, s4, s5, s6, a0, a1, a2, a3, a4, a5, at; } alpha_regs; struct { unsigned int gpr[32], cr, xer; } powerpc_regs; + struct { unsigned int r[13]; } arm_regs; struct { unsigned int g[8], o[8], l[8], i[8]; } sparc_regs; } integer; union @@ -5515,6 +5517,6 @@ union generic_reply struct set_cursor_reply set_cursor_reply; };
-#define SERVER_PROTOCOL_VERSION 408 +#define SERVER_PROTOCOL_VERSION 409
#endif /* __WINE_WINE_SERVER_PROTOCOL_H */ diff --git a/server/protocol.def b/server/protocol.def index e3e078d..660981f 100644 --- a/server/protocol.def +++ b/server/protocol.def @@ -145,7 +145,7 @@ typedef union /* supported CPU types */ enum cpu_type { - CPU_x86, CPU_x86_64, CPU_ALPHA, CPU_POWERPC, CPU_SPARC + CPU_x86, CPU_x86_64, CPU_ALPHA, CPU_POWERPC, CPU_ARM, CPU_SPARC }; typedef int cpu_type_t;
@@ -162,6 +162,7 @@ typedef struct struct { unsigned __int64 fir; unsigned int psr, __pad; } alpha_regs; struct { unsigned int iar, msr, ctr, lr, dar, dsisr, trap, __pad; } powerpc_regs; + struct { unsigned int sp, lr, pc, cpsr; } arm_regs; struct { unsigned int psr, pc, npc, y, wim, tbr; } sparc_regs; } ctl; /* selected by SERVER_CTX_CONTROL */ union @@ -172,6 +173,7 @@ typedef struct struct { unsigned __int64 v0, t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, s0, s1, s2, s3, s4, s5, s6, a0, a1, a2, a3, a4, a5, at; } alpha_regs; struct { unsigned int gpr[32], cr, xer; } powerpc_regs; + struct { unsigned int r[13]; } arm_regs; struct { unsigned int g[8], o[8], l[8], i[8]; } sparc_regs; } integer; /* selected by SERVER_CTX_INTEGER */ union diff --git a/server/thread.c b/server/thread.c index a1d2d4b..05e4121 100644 --- a/server/thread.c +++ b/server/thread.c @@ -63,6 +63,8 @@ static const unsigned int supported_cpus = CPU_FLAG(CPU_ALPHA); static const unsigned int supported_cpus = CPU_FLAG(CPU_POWERPC); #elif defined(__sparc__) static const unsigned int supported_cpus = CPU_FLAG(CPU_SPARC); +#elif defined(__arm__) +static const unsigned int supported_cpus = CPU_FLAG(CPU_ARM); #else #error Unsupported CPU #endif @@ -1000,6 +1002,7 @@ static unsigned int get_context_system_regs( enum cpu_type cpu ) case CPU_x86_64: return SERVER_CTX_DEBUG_REGISTERS; case CPU_ALPHA: return 0; case CPU_POWERPC: return 0; + case CPU_ARM: return 0; case CPU_SPARC: return 0; } return 0; @@ -1033,6 +1036,9 @@ void break_thread( struct thread *thread ) case CPU_SPARC: data.exception.address = thread->context->ctl.sparc_regs.pc; break; + case CPU_ARM: + data.exception.address = thread->context->ctl.arm_regs.pc; + break; } generate_debug_event( thread, EXCEPTION_DEBUG_EVENT, &data ); thread->debug_break = 0; diff --git a/server/trace.c b/server/trace.c index 6f0e01e..1d8233b 100644 --- a/server/trace.c +++ b/server/trace.c @@ -569,6 +569,14 @@ static void dump_varargs_context( const char *prefix, data_size_t size ) fprintf( stderr, ",fpscr=%g", ctx.fp.powerpc_regs.fpscr ); } break; + case CPU_ARM: + if (ctx.flags & SERVER_CTX_CONTROL) + fprintf( stderr, ",sp=%08x,lr=%08x,pc=%08x,cpsr=%08x", + ctx.ctl.arm_regs.sp, ctx.ctl.arm_regs.lr, + ctx.ctl.arm_regs.pc, ctx.ctl.arm_regs.cpsr ); + if (ctx.flags & SERVER_CTX_INTEGER) + for (i = 0; i < 13; i++) fprintf( stderr, ",r%u=%08x", i, ctx.integer.arm_regs.r[i] ); + break; case CPU_SPARC: if (ctx.flags & SERVER_CTX_CONTROL) fprintf( stderr, ",psr=%08x,pc=%08x,npc=%08x,y=%08x,wim=%08x,tbr=%08x",