Module: wine Branch: master Commit: 46aedd2ba4623f5ea72233d90c41c2291211b423 URL: http://source.winehq.org/git/wine.git/?a=commit;h=46aedd2ba4623f5ea72233d90c...
Author: Alexandre Julliard julliard@winehq.org Date: Fri Dec 8 13:22:31 2017 +0100
oleaut32: Disable floating point instructions for the soft-float ARM build.
Signed-off-by: Alexandre Julliard julliard@winehq.org
---
dlls/oleaut32/typelib.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/dlls/oleaut32/typelib.c b/dlls/oleaut32/typelib.c index 388f108..4e72ac0 100644 --- a/dlls/oleaut32/typelib.c +++ b/dlls/oleaut32/typelib.c @@ -6443,7 +6443,10 @@ __ASM_GLOBAL_FUNC( call_method, "subs r1, r1, #4\n\t" /* Decrement count */ "bgt 2b\n\t" /* Loop till done */
- "1:\tvldm r3!, {s0-s15}\n\t" /* Load the s0-s15/d0-d7 arguments */ + "1:\n\t" +#ifndef __SOFTFP__ + "vldm r3!, {s0-s15}\n\t" /* Load the s0-s15/d0-d7 arguments */ +#endif "mov ip, r0\n\t" /* Save the function call address to ip before we nuke r0 with arguments to pass */ "ldm r3, {r0-r3}\n\t" /* Load the r0-r3 arguments */
@@ -6854,14 +6857,18 @@ DispCallFunc( UINT i; DWORD *args; struct { +#ifndef __SOFTFP__ union { float s[16]; double d[8]; } sd; +#endif DWORD r[4]; } regs; int rcount; /* 32-bit register index count */ - int scount; /* single-precision float register index count (will be incremented twice for doubles, plus alignment) */ +#ifndef __SOFTFP__ + int scount = 0; /* single-precision float register index count (will be incremented twice for doubles, plus alignment) */ +#endif
TRACE("(%p, %ld, %d, %d, %d, %p, %p, %p (vt=%d))\n", pvInstance, oVft, cc, vtReturn, cActuals, prgvt, prgpvarg, pvargResult, V_VT(pvargResult)); @@ -6874,7 +6881,6 @@ DispCallFunc(
argspos = 0; rcount = 0; - scount = 0;
/* Determine if we need to pass a pointer for the return value as arg 0. If so, do that */ /* first as it will need to be in the 'r' registers: */ @@ -6912,14 +6918,9 @@ DispCallFunc( { case VT_EMPTY: break; - case VT_R4: /* these must be 4-byte aligned, and put in 's' regs or stack, as they are single-floats */ - if (scount < 16) - regs.sd.s[scount++] = V_R4(arg); - else - args[argspos++] = V_UI4(arg); - break; case VT_R8: /* these must be 8-byte aligned, and put in 'd' regs or stack, as they are double-floats */ case VT_DATE: +#ifndef __SOFTFP__ if (scount < 15) { scount += (scount % 2); /* align scount to next whole double */ @@ -6934,6 +6935,7 @@ DispCallFunc( argspos += sizeof(V_R8(arg)) / sizeof(DWORD); } break; +#endif case VT_I8: /* these must be 8-byte aligned, and put in 'r' regs or stack, as they are long-longs */ case VT_UI8: case VT_CY: @@ -6977,6 +6979,14 @@ DispCallFunc( else args[argspos++] = V_BOOL(arg); break; + case VT_R4: /* these must be 4-byte aligned, and put in 's' regs or stack, as they are single-floats */ +#ifndef __SOFTFP__ + if (scount < 16) + regs.sd.s[scount++] = V_R4(arg); + else + args[argspos++] = V_UI4(arg); + break; +#endif default: if (rcount < 4) regs.r[rcount++] = V_UI4(arg); @@ -6989,8 +6999,6 @@ DispCallFunc(
argspos += (argspos % 2); /* Make sure stack function alignment is 8-byte */
- TRACE("rcount: %d, scount: %d, argspos: %d\n", rcount, scount, argspos); - switch (vtReturn) { case VT_EMPTY: /* EMPTY = no return value */