Re: [PATCH] V3 msvcrt : add arm implementation for _control87

[Vijay Kiran Kamuju]

Hi Piotr,

On Fri, Nov 17, 2017 at 2:26 PM, Piotr Caban  wrote:
> Hi,
>
> On 11/12/17 16:13, Vijay Kiran Kamuju wrote:
> > - __asm__ __volatile__( "vmrs %0, fpscr" : "=r" (fpword) );
> > - if (fpword & 0x1)  flags |= MSVCRT__EM_INVALID;
> > - if (fpword & 0x2)  flags |= MSVCRT__EM_ZERODIVIDE;
> > - if (fpword & 0x4)  flags |= MSVCRT__EM_OVERFLOW;
> > - if (fpword & 0x8)  flags |= MSVCRT__EM_UNDERFLOW;
> > - if (fpword & 0x10) flags |= MSVCRT__EM_INEXACT;
>
> The fpword&0x1f seems to be used for status word. The exception trap enable
> bits are in fpword&0x1f00. The meaning of flag being set on arm is different
> then on i386 (enable trap vs mask).

I have written this based on the arm documentation.
I might have misunderstood the meaning of flags and mask.
Used the below arm docs for reference:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/BCFHFBG...
> > - if (fpword & 0x80) flags |= MSVCRT__EM_DENORMAL;
>
> As far as I can see ARM doesn't support _EM_DENORMAL. The documentation says
> that 0x80 bit of fpword should not be modified unless you know what VFP
> coprocessor is used. Some other bits should also not be modified (like e.g.
> status word).

MSDN documentation says that DENORMAL flags are used on arm platform.

https://msdn.microsoft.com/en-us/library/e9b52ceh.aspx

ARM docs:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/BCFHFBG...
http://infocenter.arm.com/help/topic/com.arm.doc.dui0068b/BCFHECHE.html
> > -
> >    switch (flags & MSVCRT__MCW_RC)
> > -
> >    {
> > -
> >    case MSVCRT__RC_UP|MSVCRT__RC_DOWN: fpword |= 0xc00000; break;
> > -
> >    case MSVCRT__RC_DOWN:               fpword |= 0x800000; break;
> > -
> >    case MSVCRT__RC_UP:                 fpword |= 0x200000; break;
>
> The _RC_UP case is broken.

I will check this again. Will wait till I have the arm machine to test this.
> Thanks,
> Piotr

Thanks,
Vijay