Signed-off-by: Matteo Bruni mbruni@codeweavers.com --- dlls/d3dcompiler_43/asmparser.c | 968 ++++++++-------- dlls/d3dcompiler_43/asmshader.y | 68 +- dlls/d3dcompiler_43/bytecodewriter.c | 1257 +++++++++++---------- dlls/d3dcompiler_43/compiler.c | 7 +- dlls/d3dcompiler_43/d3dcompiler_private.h | 141 +-- dlls/d3dcompiler_43/reflection.c | 344 +++--- dlls/d3dcompiler_43/utils.c | 154 +-- 7 files changed, 1570 insertions(+), 1369 deletions(-)
diff --git a/dlls/d3dcompiler_43/asmparser.c b/dlls/d3dcompiler_43/asmparser.c index fff11969581..3e400827d92 100644 --- a/dlls/d3dcompiler_43/asmparser.c +++ b/dlls/d3dcompiler_43/asmparser.c @@ -71,139 +71,163 @@ static void asmparser_end(struct asm_parser *This) { TRACE("Finalizing shader\n"); }
-static void asmparser_constF(struct asm_parser *This, DWORD reg, float x, float y, float z, float w) { - if(!This->shader) return; - TRACE("Adding float constant %lu at pos %u.\n", reg, This->shader->num_cf); - TRACE_(parsed_shader)("def c%lu, %f, %f, %f, %f\n", reg, x, y, z, w); - if(!add_constF(This->shader, reg, x, y, z, w)) { - ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_constF(struct asm_parser *parser, uint32_t reg, float x, float y, float z, float w) +{ + if (!parser->shader) + return; + TRACE("Adding float constant %u at pos %u.\n", reg, parser->shader->num_cf); + TRACE_(parsed_shader)("def c%u, %f, %f, %f, %f\n", reg, x, y, z, w); + if (!add_constF(parser->shader, reg, x, y, z, w)) + { + ERR("Out of memory.\n"); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_constB(struct asm_parser *This, DWORD reg, BOOL x) { - if(!This->shader) return; - TRACE("Adding boolean constant %lu at pos %u.\n", reg, This->shader->num_cb); - TRACE_(parsed_shader)("def b%lu, %s\n", reg, x ? "true" : "false"); - if(!add_constB(This->shader, reg, x)) { - ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_constB(struct asm_parser *parser, uint32_t reg, BOOL x) +{ + if (!parser->shader) + return; + TRACE("Adding boolean constant %u at pos %u.\n", reg, parser->shader->num_cb); + TRACE_(parsed_shader)("def b%u, %s\n", reg, x ? "true" : "false"); + if (!add_constB(parser->shader, reg, x)) + { + ERR("Out of memory.\n"); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_constI(struct asm_parser *This, DWORD reg, INT x, INT y, INT z, INT w) { - if(!This->shader) return; - TRACE("Adding integer constant %lu at pos %u.\n", reg, This->shader->num_ci); - TRACE_(parsed_shader)("def i%lu, %d, %d, %d, %d\n", reg, x, y, z, w); - if(!add_constI(This->shader, reg, x, y, z, w)) { - ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_constI(struct asm_parser *parser, uint32_t reg, int x, int y, int z, int w) +{ + if (!parser->shader) + return; + TRACE("Adding integer constant %u at pos %u.\n", reg, parser->shader->num_ci); + TRACE_(parsed_shader)("def i%u, %d, %d, %d, %d\n", reg, x, y, z, w); + if (!add_constI(parser->shader, reg, x, y, z, w)) + { + ERR("Out of memory.\n"); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_dcl_output(struct asm_parser *This, DWORD usage, DWORD num, - const struct shader_reg *reg) { - if(!This->shader) return; - if(This->shader->type == ST_PIXEL) { - asmparser_message(This, "Line %u: Output register declared in a pixel shader\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_dcl_output(struct asm_parser *parser, uint32_t usage, uint32_t num, + const struct shader_reg *reg) +{ + if (!parser->shader) + return; + if (parser->shader->type == ST_PIXEL) + { + asmparser_message(parser, "Line %u: Output register declared in a pixel shader\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); } - if(!record_declaration(This->shader, usage, num, 0, TRUE, reg->regnum, reg->u.writemask, FALSE)) { + if (!record_declaration(parser->shader, usage, num, 0, TRUE, reg->regnum, reg->writemask, FALSE)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_dcl_output_unsupported(struct asm_parser *This, DWORD usage, DWORD num, - const struct shader_reg *reg) { - asmparser_message(This, "Line %u: Output declaration unsupported in this shader version\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_dcl_output_unsupported(struct asm_parser *parser, uint32_t usage, uint32_t num, + const struct shader_reg *reg) +{ + asmparser_message(parser, "Line %u: Output declaration unsupported in this shader version\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); }
-static void asmparser_dcl_input(struct asm_parser *This, DWORD usage, DWORD num, - DWORD mod, const struct shader_reg *reg) { +static void asmparser_dcl_input(struct asm_parser *parser, uint32_t usage, uint32_t num, uint32_t mod, + const struct shader_reg *reg) +{ struct instruction instr;
- if(!This->shader) return; - if (mod && (This->shader->type != ST_PIXEL || This->shader->major_version != 3 + if (!parser->shader) + return; + if (mod && (parser->shader->type != ST_PIXEL || parser->shader->major_version != 3 || (mod != BWRITERSPDM_MSAMPCENTROID && mod != BWRITERSPDM_PARTIALPRECISION))) { - asmparser_message(This, "Line %u: Unsupported modifier in dcl instruction\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + asmparser_message(parser, "Line %u: Unsupported modifier in dcl instruction\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); return; }
/* Check register type and modifiers */ instr.dstmod = mod; instr.shift = 0; - This->funcs->dstreg(This, &instr, reg); + parser->funcs->dstreg(parser, &instr, reg);
- if(!record_declaration(This->shader, usage, num, mod, FALSE, reg->regnum, reg->u.writemask, FALSE)) { + if (!record_declaration(parser->shader, usage, num, mod, FALSE, reg->regnum, reg->writemask, FALSE)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_dcl_input_ps_2(struct asm_parser *This, DWORD usage, DWORD num, - DWORD mod, const struct shader_reg *reg) { +static void asmparser_dcl_input_ps_2(struct asm_parser *parser, uint32_t usage, uint32_t num, uint32_t mod, + const struct shader_reg *reg) +{ struct instruction instr;
- if(!This->shader) return; + if (!parser->shader) + return; instr.dstmod = mod; instr.shift = 0; - This->funcs->dstreg(This, &instr, reg); - if(!record_declaration(This->shader, usage, num, mod, FALSE, instr.dst.regnum, instr.dst.u.writemask, FALSE)) { + parser->funcs->dstreg(parser, &instr, reg); + if (!record_declaration(parser->shader, usage, num, mod, FALSE, instr.dst.regnum, instr.dst.writemask, FALSE)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_dcl_input_unsupported(struct asm_parser *This, - DWORD usage, DWORD num, DWORD mod, const struct shader_reg *reg) +static void asmparser_dcl_input_unsupported(struct asm_parser *parser, uint32_t usage, uint32_t num, uint32_t mod, + const struct shader_reg *reg) { - asmparser_message(This, "Line %u: Input declaration unsupported in this shader version\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + asmparser_message(parser, "Line %u: Input declaration unsupported in this shader version\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); }
-static void asmparser_dcl_sampler(struct asm_parser *This, DWORD samptype, - DWORD mod, DWORD regnum, - unsigned int line_no) { - if(!This->shader) return; - if (mod && (This->shader->type != ST_PIXEL || This->shader->major_version != 3 +static void asmparser_dcl_sampler(struct asm_parser *parser, uint32_t samptype, uint32_t mod, uint32_t regnum, + unsigned int line_no) +{ + if (!parser->shader) + return; + if (mod && (parser->shader->type != ST_PIXEL || parser->shader->major_version != 3 || (mod != BWRITERSPDM_MSAMPCENTROID && mod != BWRITERSPDM_PARTIALPRECISION))) { - asmparser_message(This, "Line %u: Unsupported modifier in dcl instruction\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + asmparser_message(parser, "Line %u: Unsupported modifier in dcl instruction\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); return; } - if(!record_sampler(This->shader, samptype, mod, regnum)) { + if (!record_sampler(parser->shader, samptype, mod, regnum)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_dcl_sampler_unsupported(struct asm_parser *This, - DWORD samptype, DWORD mod, DWORD regnum, unsigned int line_no) +static void asmparser_dcl_sampler_unsupported(struct asm_parser *parser, uint32_t samptype, uint32_t mod, + uint32_t regnum, unsigned int line_no) { - asmparser_message(This, "Line %u: Sampler declaration unsupported in this shader version\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + asmparser_message(parser, "Line %u: Sampler declaration unsupported in this shader version\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); }
-static void asmparser_sincos(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct src_regs *srcs) { +static void asmparser_sincos(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct src_regs *srcs) +{ struct instruction *instr;
- if(!srcs || srcs->count != 3) { - asmparser_message(This, "Line %u: sincos (vs 2) has an incorrect number of source registers\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + if (!srcs || srcs->count != 3) + { + asmparser_message(parser, "Line %u: sincos (vs 2) has an incorrect number of source registers\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); return; }
instr = alloc_instr(3); - if(!instr) { + if (!instr) + { ERR("Error allocating memory for the instruction\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); return; }
@@ -212,25 +236,31 @@ static void asmparser_sincos(struct asm_parser *This, DWORD mod, DWORD shift, instr->shift = shift; instr->comptype = 0;
- This->funcs->dstreg(This, instr, dst); - This->funcs->srcreg(This, instr, 0, &srcs->reg[0]); - This->funcs->srcreg(This, instr, 1, &srcs->reg[1]); - This->funcs->srcreg(This, instr, 2, &srcs->reg[2]); + parser->funcs->dstreg(parser, instr, dst); + parser->funcs->srcreg(parser, instr, 0, &srcs->reg[0]); + parser->funcs->srcreg(parser, instr, 1, &srcs->reg[1]); + parser->funcs->srcreg(parser, instr, 2, &srcs->reg[2]);
- if(!add_instruction(This->shader, instr)) { + if (!add_instruction(parser->shader, instr)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static struct shader_reg map_oldps_register(const struct shader_reg *reg, BOOL tex_varying) { +static struct shader_reg map_oldps_register(const struct shader_reg *reg, BOOL tex_varying) +{ struct shader_reg ret; - switch(reg->type) { + + switch (reg->type) + { case BWRITERSPR_TEXTURE: - if(tex_varying) { + if (tex_varying) + { ret = *reg; ret.type = BWRITERSPR_INPUT; - switch(reg->regnum) { + switch (reg->regnum) + { case 0: ret.regnum = T0_VARYING; break; case 1: ret.regnum = T1_VARYING; break; case 2: ret.regnum = T2_VARYING; break; @@ -240,20 +270,23 @@ static struct shader_reg map_oldps_register(const struct shader_reg *reg, BOOL t case 6: ret.regnum = T6_VARYING; break; case 7: ret.regnum = T7_VARYING; break; default: - FIXME("Unexpected TEXTURE register t%lu.\n", reg->regnum); + FIXME("Unexpected TEXTURE register t%u.\n", reg->regnum); return *reg; } return ret; - } else { + } + else + { ret = *reg; ret.type = BWRITERSPR_TEMP; - switch(reg->regnum) { + switch(reg->regnum) + { case 0: ret.regnum = T0_REG; break; case 1: ret.regnum = T1_REG; break; case 2: ret.regnum = T2_REG; break; case 3: ret.regnum = T3_REG; break; default: - FIXME("Unexpected TEXTURE register t%lu.\n", reg->regnum); + FIXME("Unexpected TEXTURE register t%u.\n", reg->regnum); return *reg; } return ret; @@ -266,21 +299,23 @@ static struct shader_reg map_oldps_register(const struct shader_reg *reg, BOOL t } }
-static void asmparser_texcoord(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct src_regs *srcs) { +static void asmparser_texcoord(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct src_regs *srcs) +{ struct instruction *instr;
- if(srcs) { - asmparser_message(This, "Line %u: Source registers in texcoord instruction\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + if (srcs) + { + asmparser_message(parser, "Line %u: Source registers in texcoord instruction\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); return; }
instr = alloc_instr(1); - if(!instr) { + if (!instr) + { ERR("Error allocating memory for the instruction\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); return; }
@@ -293,31 +328,34 @@ static void asmparser_texcoord(struct asm_parser *This, DWORD mod, DWORD shift, instr->shift = shift; instr->comptype = 0;
- This->funcs->dstreg(This, instr, dst); + parser->funcs->dstreg(parser, instr, dst); /* The src reg needs special care */ instr->src[0] = map_oldps_register(dst, TRUE);
- if(!add_instruction(This->shader, instr)) { + if (!add_instruction(parser->shader, instr)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_texcrd(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct src_regs *srcs) { +static void asmparser_texcrd(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct src_regs *srcs) +{ struct instruction *instr;
- if(!srcs || srcs->count != 1) { - asmparser_message(This, "Line %u: Wrong number of source registers in texcrd instruction\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + if (!srcs || srcs->count != 1) + { + asmparser_message(parser, "Line %u: Wrong number of source registers in texcrd instruction\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); return; }
instr = alloc_instr(1); - if(!instr) { + if (!instr) + { ERR("Error allocating memory for the instruction\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); return; }
@@ -327,22 +365,24 @@ static void asmparser_texcrd(struct asm_parser *This, DWORD mod, DWORD shift, instr->shift = shift; instr->comptype = 0;
- This->funcs->dstreg(This, instr, dst); - This->funcs->srcreg(This, instr, 0, &srcs->reg[0]); + parser->funcs->dstreg(parser, instr, dst); + parser->funcs->srcreg(parser, instr, 0, &srcs->reg[0]);
- if(!add_instruction(This->shader, instr)) { + if (!add_instruction(parser->shader, instr)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_texkill(struct asm_parser *This, - const struct shader_reg *dst) { +static void asmparser_texkill(struct asm_parser *parser, const struct shader_reg *dst) +{ struct instruction *instr = alloc_instr(0);
- if(!instr) { + if (!instr) + { ERR("Error allocating memory for the instruction\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); return; }
@@ -361,20 +401,22 @@ static void asmparser_texkill(struct asm_parser *This, instr->dst = map_oldps_register(dst, TRUE); instr->has_dst = TRUE;
- if(!add_instruction(This->shader, instr)) { + if (!add_instruction(parser->shader, instr)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_texhelper(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct shader_reg *src0) { +static void asmparser_texhelper(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct shader_reg *src0) +{ struct instruction *instr = alloc_instr(2);
- if(!instr) { + if (!instr) + { ERR("Error allocating memory for the instruction\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); return; }
@@ -383,7 +425,7 @@ static void asmparser_texhelper(struct asm_parser *This, DWORD mod, DWORD shift, instr->shift = shift; instr->comptype = 0; /* The dest register can be mapped normally to a temporary register */ - This->funcs->dstreg(This, instr, dst); + parser->funcs->dstreg(parser, instr, dst); /* Use the src passed as parameter by the specific instruction handler */ instr->src[0] = *src0;
@@ -393,40 +435,43 @@ static void asmparser_texhelper(struct asm_parser *This, DWORD mod, DWORD shift, ZeroMemory(&instr->src[1], sizeof(instr->src[1])); instr->src[1].type = BWRITERSPR_SAMPLER; instr->src[1].regnum = dst->regnum; - instr->src[1].u.swizzle = BWRITERVS_NOSWIZZLE; + instr->src[1].swizzle = BWRITERVS_NOSWIZZLE; instr->src[1].srcmod = BWRITERSPSM_NONE; instr->src[1].rel_reg = NULL;
- if(!add_instruction(This->shader, instr)) { + if (!add_instruction(parser->shader, instr)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_tex(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst) { +static void asmparser_tex(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst) +{ struct shader_reg src;
/* The first source register is the varying containing the coordinate */ src = map_oldps_register(dst, TRUE); - asmparser_texhelper(This, mod, shift, dst, &src); + asmparser_texhelper(parser, mod, shift, dst, &src); }
-static void asmparser_texld14(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct src_regs *srcs) { +static void asmparser_texld14(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct src_regs *srcs) +{ struct instruction *instr;
- if(!srcs || srcs->count != 1) { - asmparser_message(This, "Line %u: texld (PS 1.4) has a wrong number of source registers\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + if (!srcs || srcs->count != 1) + { + asmparser_message(parser, "Line %u: texld (PS 1.4) has a wrong number of source registers\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); return; }
instr = alloc_instr(2); - if(!instr) { + if (!instr) + { ERR("Error allocating memory for the instruction\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); return; }
@@ -438,8 +483,8 @@ static void asmparser_texld14(struct asm_parser *This, DWORD mod, DWORD shift, instr->shift = shift; instr->comptype = 0;
- This->funcs->dstreg(This, instr, dst); - This->funcs->srcreg(This, instr, 0, &srcs->reg[0]); + parser->funcs->dstreg(parser, instr, dst); + parser->funcs->srcreg(parser, instr, 0, &srcs->reg[0]);
/* The 2nd source register is the sampler register with the * destination's regnum @@ -447,47 +492,48 @@ static void asmparser_texld14(struct asm_parser *This, DWORD mod, DWORD shift, ZeroMemory(&instr->src[1], sizeof(instr->src[1])); instr->src[1].type = BWRITERSPR_SAMPLER; instr->src[1].regnum = dst->regnum; - instr->src[1].u.swizzle = BWRITERVS_NOSWIZZLE; + instr->src[1].swizzle = BWRITERVS_NOSWIZZLE; instr->src[1].srcmod = BWRITERSPSM_NONE; instr->src[1].rel_reg = NULL;
- if(!add_instruction(This->shader, instr)) { + if (!add_instruction(parser->shader, instr)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void asmparser_texreg2ar(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct shader_reg *src0) { +static void asmparser_texreg2ar(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct shader_reg *src0) +{ struct shader_reg src;
src = map_oldps_register(src0, FALSE); /* Supply the correct swizzle */ - src.u.swizzle = BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X; - asmparser_texhelper(This, mod, shift, dst, &src); + src.swizzle = BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X; + asmparser_texhelper(parser, mod, shift, dst, &src); }
-static void asmparser_texreg2gb(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct shader_reg *src0) { +static void asmparser_texreg2gb(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct shader_reg *src0) +{ struct shader_reg src;
src = map_oldps_register(src0, FALSE); /* Supply the correct swizzle */ - src.u.swizzle = BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z; - asmparser_texhelper(This, mod, shift, dst, &src); + src.swizzle = BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z; + asmparser_texhelper(parser, mod, shift, dst, &src); }
-static void asmparser_texreg2rgb(struct asm_parser *This, DWORD mod, DWORD shift, - const struct shader_reg *dst, - const struct shader_reg *src0) { +static void asmparser_texreg2rgb(struct asm_parser *parser, uint32_t mod, uint32_t shift, const struct shader_reg *dst, + const struct shader_reg *src0) +{ struct shader_reg src;
src = map_oldps_register(src0, FALSE); /* Supply the correct swizzle */ - src.u.swizzle = BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z | BWRITERVS_W_Z; - asmparser_texhelper(This, mod, shift, dst, &src); + src.swizzle = BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z | BWRITERVS_W_Z; + asmparser_texhelper(parser, mod, shift, dst, &src); }
/* Complex pixel shader 1.3 instructions like texm3x3tex are tricky - the @@ -497,40 +543,45 @@ static void asmparser_texreg2rgb(struct asm_parser *This, DWORD mod, DWORD shift * go through asmparser_instr). */
-static void asmparser_instr(struct asm_parser *This, DWORD opcode, DWORD mod, DWORD shift, +static void asmparser_instr(struct asm_parser *parser, uint32_t opcode, uint32_t mod, uint32_t shift, enum bwriter_comparison_type comp, const struct shader_reg *dst, const struct src_regs *srcs, int expectednsrcs) { - struct bwriter_shader *shader = This->shader; + unsigned int src_count = srcs ? srcs->count : 0; + struct bwriter_shader *shader = parser->shader; struct instruction *instr; - unsigned int i; BOOL firstreg = TRUE; - unsigned int src_count = srcs ? srcs->count : 0; + unsigned int i;
- if(!This->shader) return; + if (!parser->shader) + return;
TRACE_(parsed_shader)("%s%s%s%s ", debug_print_opcode(opcode), debug_print_dstmod(mod), debug_print_shift(shift), debug_print_comp(comp)); - if(dst) { + if (dst) + { TRACE_(parsed_shader)("%s", debug_print_dstreg(dst)); firstreg = FALSE; } - for(i = 0; i < src_count; i++) { - if(!firstreg) TRACE_(parsed_shader)(", "); + for (i = 0; i < src_count; i++) + { + if (!firstreg) + TRACE_(parsed_shader)(", "); else firstreg = FALSE; TRACE_(parsed_shader)("%s", debug_print_srcreg(&srcs->reg[i])); } TRACE_(parsed_shader)("\n");
/* Check for instructions with different syntaxes in different shader versions */ - switch(opcode) { + switch(opcode) + { case BWRITERSIO_SINCOS: /* The syntax changes between vs 2 and the other shader versions */ - if (This->shader->type == ST_VERTEX && This->shader->major_version == 2) + if (parser->shader->type == ST_VERTEX && parser->shader->major_version == 2) { - asmparser_sincos(This, mod, shift, dst, srcs); + asmparser_sincos(parser, mod, shift, dst, srcs); return; } /* Use the default handling */ @@ -538,9 +589,9 @@ static void asmparser_instr(struct asm_parser *This, DWORD opcode, DWORD mod, DW case BWRITERSIO_TEXCOORD: /* texcoord/texcrd are two instructions present only in PS <= 1.3 and PS 1.4 respectively */ if (shader->type == ST_PIXEL && shader->major_version == 1 && shader->minor_version == 4) - asmparser_texcrd(This, mod, shift, dst, srcs); + asmparser_texcrd(parser, mod, shift, dst, srcs); else - asmparser_texcoord(This, mod, shift, dst, srcs); + asmparser_texcoord(parser, mod, shift, dst, srcs); return; case BWRITERSIO_TEX: /* this encodes both the tex PS 1.x instruction and the @@ -548,41 +599,44 @@ static void asmparser_instr(struct asm_parser *This, DWORD opcode, DWORD mod, DW if (shader->type == ST_PIXEL && shader->major_version == 1) { if (shader->minor_version < 4) - asmparser_tex(This, mod, shift, dst); + asmparser_tex(parser, mod, shift, dst); else - asmparser_texld14(This, mod, shift, dst, srcs); + asmparser_texld14(parser, mod, shift, dst, srcs); return; } /* else fallback to the standard behavior */ break; }
- if(src_count != expectednsrcs) { - asmparser_message(This, "Line %u: Wrong number of source registers\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); + if (src_count != expectednsrcs) + { + asmparser_message(parser, "Line %u: Wrong number of source registers\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); return; }
/* Handle PS 1.x instructions, "regularizing" them */ - switch(opcode) { + switch(opcode) + { case BWRITERSIO_TEXKILL: - asmparser_texkill(This, dst); + asmparser_texkill(parser, dst); return; case BWRITERSIO_TEXREG2AR: - asmparser_texreg2ar(This, mod, shift, dst, &srcs->reg[0]); + asmparser_texreg2ar(parser, mod, shift, dst, &srcs->reg[0]); return; case BWRITERSIO_TEXREG2GB: - asmparser_texreg2gb(This, mod, shift, dst, &srcs->reg[0]); + asmparser_texreg2gb(parser, mod, shift, dst, &srcs->reg[0]); return; case BWRITERSIO_TEXREG2RGB: - asmparser_texreg2rgb(This, mod, shift, dst, &srcs->reg[0]); + asmparser_texreg2rgb(parser, mod, shift, dst, &srcs->reg[0]); return; }
instr = alloc_instr(src_count); - if(!instr) { + if (!instr) + { ERR("Error allocating memory for the instruction\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); return; }
@@ -590,37 +644,44 @@ static void asmparser_instr(struct asm_parser *This, DWORD opcode, DWORD mod, DW instr->dstmod = mod; instr->shift = shift; instr->comptype = comp; - if(dst) This->funcs->dstreg(This, instr, dst); - for(i = 0; i < src_count; i++) { - This->funcs->srcreg(This, instr, i, &srcs->reg[i]); + if (dst) + parser->funcs->dstreg(parser, instr, dst); + for (i = 0; i < src_count; i++) + { + parser->funcs->srcreg(parser, instr, i, &srcs->reg[i]); }
- if(!add_instruction(This->shader, instr)) { + if (!add_instruction(parser->shader, instr)) + { ERR("Out of memory\n"); - set_parse_status(&This->status, PARSE_ERR); + set_parse_status(&parser->status, PARSE_ERR); } }
-static struct shader_reg map_oldvs_register(const struct shader_reg *reg) { +static struct shader_reg map_oldvs_register(const struct shader_reg *reg) +{ struct shader_reg ret; - switch(reg->type) { + + switch(reg->type) + { case BWRITERSPR_RASTOUT: ret = *reg; ret.type = BWRITERSPR_OUTPUT; - switch(reg->regnum) { + switch(reg->regnum) + { case BWRITERSRO_POSITION: ret.regnum = OPOS_REG; break; case BWRITERSRO_FOG: ret.regnum = OFOG_REG; - ret.u.writemask = OFOG_WRITEMASK; + ret.writemask = OFOG_WRITEMASK; break; case BWRITERSRO_POINT_SIZE: ret.regnum = OPTS_REG; - ret.u.writemask = OPTS_WRITEMASK; + ret.writemask = OPTS_WRITEMASK; break; default: - FIXME("Unhandled RASTOUT register %lu.\n", reg->regnum); + FIXME("Unhandled RASTOUT register %u.\n", reg->regnum); return *reg; } return ret; @@ -628,7 +689,8 @@ static struct shader_reg map_oldvs_register(const struct shader_reg *reg) { case BWRITERSPR_TEXCRDOUT: ret = *reg; ret.type = BWRITERSPR_OUTPUT; - switch(reg->regnum) { + switch(reg->regnum) + { case 0: ret.regnum = OT0_REG; break; case 1: ret.regnum = OT1_REG; break; case 2: ret.regnum = OT2_REG; break; @@ -638,7 +700,7 @@ static struct shader_reg map_oldvs_register(const struct shader_reg *reg) { case 6: ret.regnum = OT6_REG; break; case 7: ret.regnum = OT7_REG; break; default: - FIXME("Unhandled TEXCRDOUT regnum %lu.\n", reg->regnum); + FIXME("Unhandled TEXCRDOUT regnum %u.\n", reg->regnum); return *reg; } return ret; @@ -646,11 +708,12 @@ static struct shader_reg map_oldvs_register(const struct shader_reg *reg) { case BWRITERSPR_ATTROUT: ret = *reg; ret.type = BWRITERSPR_OUTPUT; - switch(reg->regnum) { + switch(reg->regnum) + { case 0: ret.regnum = OD0_REG; break; case 1: ret.regnum = OD1_REG; break; default: - FIXME("Unhandled ATTROUT regnum %lu.\n", reg->regnum); + FIXME("Unhandled ATTROUT regnum %u.\n", reg->regnum); return *reg; } return ret; @@ -661,76 +724,85 @@ static struct shader_reg map_oldvs_register(const struct shader_reg *reg) {
/* Checks for unsupported source modifiers in VS (all versions) or PS 2.0 and newer */ -static void check_legacy_srcmod(struct asm_parser *This, DWORD srcmod) { - if(srcmod == BWRITERSPSM_BIAS || srcmod == BWRITERSPSM_BIASNEG || - srcmod == BWRITERSPSM_SIGN || srcmod == BWRITERSPSM_SIGNNEG || - srcmod == BWRITERSPSM_COMP || srcmod == BWRITERSPSM_X2 || - srcmod == BWRITERSPSM_X2NEG || srcmod == BWRITERSPSM_DZ || - srcmod == BWRITERSPSM_DW) { - asmparser_message(This, "Line %u: Source modifier %s not supported in this shader version\n", - This->line_no, - debug_print_srcmod(srcmod)); - set_parse_status(&This->status, PARSE_ERR); +static void check_legacy_srcmod(struct asm_parser *parser, uint32_t srcmod) +{ + if (srcmod == BWRITERSPSM_BIAS || srcmod == BWRITERSPSM_BIASNEG || + srcmod == BWRITERSPSM_SIGN || srcmod == BWRITERSPSM_SIGNNEG || + srcmod == BWRITERSPSM_COMP || srcmod == BWRITERSPSM_X2 || + srcmod == BWRITERSPSM_X2NEG || srcmod == BWRITERSPSM_DZ || + srcmod == BWRITERSPSM_DW) + { + asmparser_message(parser, "Line %u: Source modifier %s not supported in this shader version\n", + parser->line_no, debug_print_srcmod(srcmod)); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void check_abs_srcmod(struct asm_parser *This, DWORD srcmod) { - if(srcmod == BWRITERSPSM_ABS || srcmod == BWRITERSPSM_ABSNEG) { - asmparser_message(This, "Line %u: Source modifier %s not supported in this shader version\n", - This->line_no, - debug_print_srcmod(srcmod)); - set_parse_status(&This->status, PARSE_ERR); +static void check_abs_srcmod(struct asm_parser *parser, uint32_t srcmod) +{ + if (srcmod == BWRITERSPSM_ABS || srcmod == BWRITERSPSM_ABSNEG) + { + asmparser_message(parser, "Line %u: Source modifier %s not supported in this shader version\n", + parser->line_no, debug_print_srcmod(srcmod)); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void check_loop_swizzle(struct asm_parser *This, - const struct shader_reg *src) { - if((src->type == BWRITERSPR_LOOP && src->u.swizzle != BWRITERVS_NOSWIZZLE) || - (src->rel_reg && src->rel_reg->type == BWRITERSPR_LOOP && - src->rel_reg->u.swizzle != BWRITERVS_NOSWIZZLE)) { - asmparser_message(This, "Line %u: Swizzle not allowed on aL register\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); +static void check_loop_swizzle(struct asm_parser *parser, const struct shader_reg *src) +{ + if ((src->type == BWRITERSPR_LOOP && src->swizzle != BWRITERVS_NOSWIZZLE) + || (src->rel_reg && src->rel_reg->type == BWRITERSPR_LOOP && + src->rel_reg->swizzle != BWRITERVS_NOSWIZZLE)) + { + asmparser_message(parser, "Line %u: Swizzle not allowed on aL register\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void check_shift_dstmod(struct asm_parser *This, DWORD shift) { - if(shift != 0) { - asmparser_message(This, "Line %u: Shift modifiers not supported in this shader version\n", - This->line_no); - set_parse_status(&This->status, PARSE_ERR); +static void check_shift_dstmod(struct asm_parser *parser, uint32_t shift) +{ + if (shift != 0) + { + asmparser_message(parser, "Line %u: Shift modifiers not supported in this shader version\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); } }
-static void check_ps_dstmod(struct asm_parser *This, DWORD dstmod) { - if(dstmod == BWRITERSPDM_PARTIALPRECISION || - dstmod == BWRITERSPDM_MSAMPCENTROID) { - asmparser_message(This, "Line %u: Instruction modifier %s not supported in this shader version\n", - This->line_no, - debug_print_dstmod(dstmod)); - set_parse_status(&This->status, PARSE_ERR); +static void check_ps_dstmod(struct asm_parser *parser, uint32_t dstmod) +{ + if(dstmod == BWRITERSPDM_PARTIALPRECISION || dstmod == BWRITERSPDM_MSAMPCENTROID) + { + asmparser_message(parser, "Line %u: Instruction modifier %s not supported in this shader version\n", + parser->line_no, debug_print_dstmod(dstmod)); + set_parse_status(&parser->status, PARSE_ERR); } }
-struct allowed_reg_type { - DWORD type; - DWORD count; +struct allowed_reg_type +{ + uint32_t type; + unsigned int count; BOOL reladdr; };
-static BOOL check_reg_type(const struct shader_reg *reg, - const struct allowed_reg_type *allowed) { +static BOOL check_reg_type(const struct shader_reg *reg, const struct allowed_reg_type *allowed) +{ unsigned int i = 0;
- while(allowed[i].type != ~0U) { - if(reg->type == allowed[i].type) { - if(reg->rel_reg) { - if(allowed[i].reladdr) - return TRUE; /* The relative addressing register - can have a negative value, we - can't check the register index */ + while (allowed[i].type != ~0u) + { + if (reg->type == allowed[i].type) + { + if (reg->rel_reg) + { + /* The relative addressing register can have a negative value, + * we can't check the register index. */ + if (allowed[i].reladdr) + return TRUE; return FALSE; } - if(reg->regnum < allowed[i].count) return TRUE; + if (reg->regnum < allowed[i].count) + return TRUE; return FALSE; } i++; @@ -739,15 +811,16 @@ static BOOL check_reg_type(const struct shader_reg *reg, }
/* Native assembler doesn't do separate checks for src and dst registers */ -static const struct allowed_reg_type vs_1_reg_allowed[] = { +static const struct allowed_reg_type vs_1_reg_allowed[] = +{ { BWRITERSPR_TEMP, 12, FALSE }, { BWRITERSPR_INPUT, 16, FALSE }, - { BWRITERSPR_CONST, ~0U, TRUE }, + { BWRITERSPR_CONST, ~0u, TRUE }, { BWRITERSPR_ADDR, 1, FALSE }, { BWRITERSPR_RASTOUT, 3, FALSE }, /* oPos, oFog and oPts */ { BWRITERSPR_ATTROUT, 2, FALSE }, { BWRITERSPR_TEXCRDOUT, 8, FALSE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
/* struct instruction *asmparser_srcreg @@ -762,27 +835,28 @@ static const struct allowed_reg_type vs_1_reg_allowed[] = { * src: Pointer to source the register structure. The caller can free * it afterwards */ -static void asmparser_srcreg_vs_1(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { +static void asmparser_srcreg_vs_1(struct asm_parser *parser, struct instruction *instr, int num, + const struct shader_reg *src) +{ struct shader_reg reg;
- if(!check_reg_type(src, vs_1_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in VS 1\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(src, vs_1_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in VS 1\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); } - check_legacy_srcmod(This, src->srcmod); - check_abs_srcmod(This, src->srcmod); + check_legacy_srcmod(parser, src->srcmod); + check_abs_srcmod(parser, src->srcmod); reg = map_oldvs_register(src); instr->src[num] = reg; }
-static const struct allowed_reg_type vs_2_reg_allowed[] = { +static const struct allowed_reg_type vs_2_reg_allowed[] = +{ { BWRITERSPR_TEMP, 12, FALSE }, { BWRITERSPR_INPUT, 16, FALSE }, - { BWRITERSPR_CONST, ~0U, TRUE }, + { BWRITERSPR_CONST, ~0u, TRUE }, { BWRITERSPR_ADDR, 1, FALSE }, { BWRITERSPR_CONSTBOOL, 16, FALSE }, { BWRITERSPR_CONSTINT, 16, FALSE }, @@ -792,31 +866,32 @@ static const struct allowed_reg_type vs_2_reg_allowed[] = { { BWRITERSPR_RASTOUT, 3, FALSE }, /* oPos, oFog and oPts */ { BWRITERSPR_ATTROUT, 2, FALSE }, { BWRITERSPR_TEXCRDOUT, 8, FALSE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
-static void asmparser_srcreg_vs_2(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { +static void asmparser_srcreg_vs_2(struct asm_parser *parser, struct instruction *instr, int num, + const struct shader_reg *src) +{ struct shader_reg reg;
- if(!check_reg_type(src, vs_2_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in VS 2\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(src, vs_2_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in VS 2\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); } - check_loop_swizzle(This, src); - check_legacy_srcmod(This, src->srcmod); - check_abs_srcmod(This, src->srcmod); + check_loop_swizzle(parser, src); + check_legacy_srcmod(parser, src->srcmod); + check_abs_srcmod(parser, src->srcmod); reg = map_oldvs_register(src); instr->src[num] = reg; }
-static const struct allowed_reg_type vs_3_reg_allowed[] = { +static const struct allowed_reg_type vs_3_reg_allowed[] = +{ { BWRITERSPR_TEMP, 32, FALSE }, { BWRITERSPR_INPUT, 16, TRUE }, - { BWRITERSPR_CONST, ~0U, TRUE }, + { BWRITERSPR_CONST, ~0u, TRUE }, { BWRITERSPR_ADDR, 1, FALSE }, { BWRITERSPR_CONSTBOOL, 16, FALSE }, { BWRITERSPR_CONSTINT, 16, FALSE }, @@ -825,72 +900,75 @@ static const struct allowed_reg_type vs_3_reg_allowed[] = { { BWRITERSPR_PREDICATE, 1, FALSE }, { BWRITERSPR_SAMPLER, 4, FALSE }, { BWRITERSPR_OUTPUT, 12, TRUE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
-static void asmparser_srcreg_vs_3(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { - if(!check_reg_type(src, vs_3_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in VS 3.0\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); - } - check_loop_swizzle(This, src); - check_legacy_srcmod(This, src->srcmod); +static void asmparser_srcreg_vs_3(struct asm_parser *parser, struct instruction *instr, int num, + const struct shader_reg *src) +{ + if (!check_reg_type(src, vs_3_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in VS 3.0\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); + } + check_loop_swizzle(parser, src); + check_legacy_srcmod(parser, src->srcmod); instr->src[num] = *src; }
-static const struct allowed_reg_type ps_1_0123_reg_allowed[] = { +static const struct allowed_reg_type ps_1_0123_reg_allowed[] = +{ { BWRITERSPR_CONST, 8, FALSE }, { BWRITERSPR_TEMP, 2, FALSE }, { BWRITERSPR_TEXTURE, 4, FALSE }, { BWRITERSPR_INPUT, 2, FALSE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
-static void asmparser_srcreg_ps_1_0123(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { +static void asmparser_srcreg_ps_1_0123(struct asm_parser *parser, struct instruction *instr, int num, + const struct shader_reg *src) +{ struct shader_reg reg;
- if(!check_reg_type(src, ps_1_0123_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in <== PS 1.3\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(src, ps_1_0123_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in <== PS 1.3\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); } - check_abs_srcmod(This, src->srcmod); + check_abs_srcmod(parser, src->srcmod); reg = map_oldps_register(src, FALSE); instr->src[num] = reg; }
-static const struct allowed_reg_type ps_1_4_reg_allowed[] = { +static const struct allowed_reg_type ps_1_4_reg_allowed[] = +{ { BWRITERSPR_CONST, 8, FALSE }, { BWRITERSPR_TEMP, 6, FALSE }, { BWRITERSPR_TEXTURE, 6, FALSE }, { BWRITERSPR_INPUT, 2, FALSE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
-static void asmparser_srcreg_ps_1_4(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { +static void asmparser_srcreg_ps_1_4(struct asm_parser *parser, struct instruction *instr, int num, + const struct shader_reg *src) +{ struct shader_reg reg;
- if(!check_reg_type(src, ps_1_4_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in PS 1.4\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(src, ps_1_4_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in PS 1.4\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); } - check_abs_srcmod(This, src->srcmod); + check_abs_srcmod(parser, src->srcmod); reg = map_oldps_register(src, TRUE); instr->src[num] = reg; }
-static const struct allowed_reg_type ps_2_0_reg_allowed[] = { +static const struct allowed_reg_type ps_2_0_reg_allowed[] = +{ { BWRITERSPR_INPUT, 2, FALSE }, { BWRITERSPR_TEMP, 32, FALSE }, { BWRITERSPR_CONST, 32, FALSE }, @@ -900,27 +978,28 @@ static const struct allowed_reg_type ps_2_0_reg_allowed[] = { { BWRITERSPR_TEXTURE, 8, FALSE }, { BWRITERSPR_COLOROUT, 4, FALSE }, { BWRITERSPR_DEPTHOUT, 1, FALSE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
-static void asmparser_srcreg_ps_2(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { +static void asmparser_srcreg_ps_2(struct asm_parser *parser, struct instruction *instr, int num, + const struct shader_reg *src) +{ struct shader_reg reg;
- if(!check_reg_type(src, ps_2_0_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in PS 2.0\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(src, ps_2_0_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in PS 2.0\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); } - check_legacy_srcmod(This, src->srcmod); - check_abs_srcmod(This, src->srcmod); + check_legacy_srcmod(parser, src->srcmod); + check_abs_srcmod(parser, src->srcmod); reg = map_oldps_register(src, TRUE); instr->src[num] = reg; }
-static const struct allowed_reg_type ps_2_x_reg_allowed[] = { +static const struct allowed_reg_type ps_2_x_reg_allowed[] = +{ { BWRITERSPR_INPUT, 2, FALSE }, { BWRITERSPR_TEMP, 32, FALSE }, { BWRITERSPR_CONST, 32, FALSE }, @@ -932,27 +1011,28 @@ static const struct allowed_reg_type ps_2_x_reg_allowed[] = { { BWRITERSPR_LABEL, 2048, FALSE }, { BWRITERSPR_COLOROUT, 4, FALSE }, { BWRITERSPR_DEPTHOUT, 1, FALSE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
-static void asmparser_srcreg_ps_2_x(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { +static void asmparser_srcreg_ps_2_x(struct asm_parser *parser, struct instruction *instr, int num, + const struct shader_reg *src) +{ struct shader_reg reg;
- if(!check_reg_type(src, ps_2_x_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in PS 2.x\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(src, ps_2_x_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in PS 2.x\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); } - check_legacy_srcmod(This, src->srcmod); - check_abs_srcmod(This, src->srcmod); + check_legacy_srcmod(parser, src->srcmod); + check_abs_srcmod(parser, src->srcmod); reg = map_oldps_register(src, TRUE); instr->src[num] = reg; }
-static const struct allowed_reg_type ps_3_reg_allowed[] = { +static const struct allowed_reg_type ps_3_reg_allowed[] = +{ { BWRITERSPR_INPUT, 10, TRUE }, { BWRITERSPR_TEMP, 32, FALSE }, { BWRITERSPR_CONST, 224, FALSE }, @@ -965,182 +1045,188 @@ static const struct allowed_reg_type ps_3_reg_allowed[] = { { BWRITERSPR_LABEL, 2048, FALSE }, { BWRITERSPR_COLOROUT, 4, FALSE }, { BWRITERSPR_DEPTHOUT, 1, FALSE }, - { ~0U, 0 } /* End tag */ + { ~0u, 0 } /* End tag */ };
-static void asmparser_srcreg_ps_3(struct asm_parser *This, - struct instruction *instr, int num, - const struct shader_reg *src) { - if(!check_reg_type(src, ps_3_reg_allowed)) { - asmparser_message(This, "Line %u: Source register %s not supported in PS 3.0\n", - This->line_no, - debug_print_srcreg(src)); - set_parse_status(&This->status, PARSE_ERR); - } - check_loop_swizzle(This, src); - check_legacy_srcmod(This, src->srcmod); +static void asmparser_srcreg_ps_3(struct asm_parser *parser,struct instruction *instr, int num, + const struct shader_reg *src) +{ + if (!check_reg_type(src, ps_3_reg_allowed)) + { + asmparser_message(parser, "Line %u: Source register %s not supported in PS 3.0\n", + parser->line_no, debug_print_srcreg(src)); + set_parse_status(&parser->status, PARSE_ERR); + } + check_loop_swizzle(parser, src); + check_legacy_srcmod(parser, src->srcmod); instr->src[num] = *src; }
-static void asmparser_dstreg_vs_1(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { +static void asmparser_dstreg_vs_1(struct asm_parser *parser, struct instruction *instr, + const struct shader_reg *dst) +{ struct shader_reg reg;
- if(!check_reg_type(dst, vs_1_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in VS 1\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(dst, vs_1_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in VS 1\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } - check_ps_dstmod(This, instr->dstmod); - check_shift_dstmod(This, instr->shift); + check_ps_dstmod(parser, instr->dstmod); + check_shift_dstmod(parser, instr->shift); reg = map_oldvs_register(dst); instr->dst = reg; instr->has_dst = TRUE; }
-static void asmparser_dstreg_vs_2(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { +static void asmparser_dstreg_vs_2(struct asm_parser *parser, struct instruction *instr, + const struct shader_reg *dst) +{ struct shader_reg reg;
- if(!check_reg_type(dst, vs_2_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in VS 2.0\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(dst, vs_2_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in VS 2.0\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } - check_ps_dstmod(This, instr->dstmod); - check_shift_dstmod(This, instr->shift); + check_ps_dstmod(parser, instr->dstmod); + check_shift_dstmod(parser, instr->shift); reg = map_oldvs_register(dst); instr->dst = reg; instr->has_dst = TRUE; }
-static void asmparser_dstreg_vs_3(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { - if(!check_reg_type(dst, vs_3_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in VS 3.0\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_dstreg_vs_3(struct asm_parser *parser,struct instruction *instr, + const struct shader_reg *dst) +{ + if (!check_reg_type(dst, vs_3_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in VS 3.0\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } - check_ps_dstmod(This, instr->dstmod); - check_shift_dstmod(This, instr->shift); + check_ps_dstmod(parser, instr->dstmod); + check_shift_dstmod(parser, instr->shift); instr->dst = *dst; instr->has_dst = TRUE; }
-static void asmparser_dstreg_ps_1_0123(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { +static void asmparser_dstreg_ps_1_0123(struct asm_parser *parser, struct instruction *instr, + const struct shader_reg *dst) +{ struct shader_reg reg;
- if(!check_reg_type(dst, ps_1_0123_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in PS 1\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(dst, ps_1_0123_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in PS 1\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } reg = map_oldps_register(dst, FALSE); instr->dst = reg; instr->has_dst = TRUE; }
-static void asmparser_dstreg_ps_1_4(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { +static void asmparser_dstreg_ps_1_4(struct asm_parser *parser, struct instruction *instr, + const struct shader_reg *dst) +{ struct shader_reg reg;
- if(!check_reg_type(dst, ps_1_4_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in PS 1\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(dst, ps_1_4_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in PS 1\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } reg = map_oldps_register(dst, TRUE); instr->dst = reg; instr->has_dst = TRUE; }
-static void asmparser_dstreg_ps_2(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { +static void asmparser_dstreg_ps_2(struct asm_parser *parser, struct instruction *instr, + const struct shader_reg *dst) +{ struct shader_reg reg;
- if(!check_reg_type(dst, ps_2_0_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in PS 2.0\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(dst, ps_2_0_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in PS 2.0\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } - check_shift_dstmod(This, instr->shift); + check_shift_dstmod(parser, instr->shift); reg = map_oldps_register(dst, TRUE); instr->dst = reg; instr->has_dst = TRUE; }
-static void asmparser_dstreg_ps_2_x(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { +static void asmparser_dstreg_ps_2_x(struct asm_parser *parser, struct instruction *instr, + const struct shader_reg *dst) +{ struct shader_reg reg;
- if(!check_reg_type(dst, ps_2_x_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in PS 2.x\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); + if (!check_reg_type(dst, ps_2_x_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in PS 2.x\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } - check_shift_dstmod(This, instr->shift); + check_shift_dstmod(parser, instr->shift); reg = map_oldps_register(dst, TRUE); instr->dst = reg; instr->has_dst = TRUE; }
-static void asmparser_dstreg_ps_3(struct asm_parser *This, - struct instruction *instr, - const struct shader_reg *dst) { - if(!check_reg_type(dst, ps_3_reg_allowed)) { - asmparser_message(This, "Line %u: Destination register %s not supported in PS 3.0\n", - This->line_no, - debug_print_dstreg(dst)); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_dstreg_ps_3(struct asm_parser *parser, struct instruction *instr, + const struct shader_reg *dst) +{ + if (!check_reg_type(dst, ps_3_reg_allowed)) + { + asmparser_message(parser, "Line %u: Destination register %s not supported in PS 3.0\n", + parser->line_no, debug_print_dstreg(dst)); + set_parse_status(&parser->status, PARSE_ERR); } - check_shift_dstmod(This, instr->shift); + check_shift_dstmod(parser, instr->shift); instr->dst = *dst; instr->has_dst = TRUE; }
-static void asmparser_predicate_supported(struct asm_parser *This, - const struct shader_reg *predicate) { - /* this sets the predicate of the last instruction added to the shader */ - if(!This->shader) return; - if(This->shader->num_instrs == 0) ERR("Predicate without an instruction\n"); - This->shader->instr[This->shader->num_instrs - 1]->has_predicate = TRUE; - This->shader->instr[This->shader->num_instrs - 1]->predicate = *predicate; +static void asmparser_predicate_supported(struct asm_parser *parser, const struct shader_reg *predicate) +{ + if (!parser->shader) + return; + if (parser->shader->num_instrs == 0) + ERR("Predicate without an instruction.\n"); + /* Set the predicate of the last instruction added to the shader. */ + parser->shader->instr[parser->shader->num_instrs - 1]->has_predicate = TRUE; + parser->shader->instr[parser->shader->num_instrs - 1]->predicate = *predicate; }
-static void asmparser_predicate_unsupported(struct asm_parser *This, - const struct shader_reg *predicate) { - asmparser_message(This, "Line %u: Predicate not supported in < VS 2.0 or PS 2.x\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_predicate_unsupported(struct asm_parser *parser, const struct shader_reg *predicate) +{ + asmparser_message(parser, "Line %u: Predicate not supported in < VS 2.0 or PS 2.x\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); }
-static void asmparser_coissue_supported(struct asm_parser *This) { - /* this sets the coissue flag of the last instruction added to the shader */ - if(!This->shader) return; - if(This->shader->num_instrs == 0){ - asmparser_message(This, "Line %u: Coissue flag on the first shader instruction\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_coissue_supported(struct asm_parser *parser) +{ + if (!parser->shader) + return; + if (parser->shader->num_instrs == 0) + { + asmparser_message(parser, "Line %u: Coissue flag on the first shader instruction\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); } - This->shader->instr[This->shader->num_instrs-1]->coissue = TRUE; + /* Set the coissue flag of the last instruction added to the shader. */ + parser->shader->instr[parser->shader->num_instrs - 1]->coissue = TRUE; }
-static void asmparser_coissue_unsupported(struct asm_parser *This) { - asmparser_message(This, "Line %u: Coissue is only supported in pixel shaders versions <= 1.4\n", This->line_no); - set_parse_status(&This->status, PARSE_ERR); +static void asmparser_coissue_unsupported(struct asm_parser *parser) +{ + asmparser_message(parser, "Line %u: Coissue is only supported in pixel shaders versions <= 1.4\n", parser->line_no); + set_parse_status(&parser->status, PARSE_ERR); }
static const struct asmparser_backend parser_vs_1 = { @@ -1319,8 +1405,10 @@ static void gen_oldvs_output(struct bwriter_shader *shader) { record_declaration(shader, BWRITERDECLUSAGE_COLOR, 1, 0, TRUE, OD1_REG, BWRITERSP_WRITEMASK_ALL, TRUE); }
-static void gen_oldps_input(struct bwriter_shader *shader, DWORD texcoords) { - switch(texcoords) { +static void gen_oldps_input(struct bwriter_shader *shader, uint32_t texcoords) +{ + switch(texcoords) + { case 8: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 7, 0, FALSE, T7_VARYING, BWRITERSP_WRITEMASK_ALL, TRUE); /* fall through */ case 7: record_declaration(shader, BWRITERDECLUSAGE_TEXCOORD, 6, 0, FALSE, T6_VARYING, BWRITERSP_WRITEMASK_ALL, TRUE); diff --git a/dlls/d3dcompiler_43/asmshader.y b/dlls/d3dcompiler_43/asmshader.y index ff0f1e3ec9c..00c98b1dbc3 100644 --- a/dlls/d3dcompiler_43/asmshader.y +++ b/dlls/d3dcompiler_43/asmshader.y @@ -54,7 +54,7 @@ static void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) { return; } reg->rel_reg->type = rel->type; - reg->rel_reg->u.swizzle = rel->swizzle; + reg->rel_reg->swizzle = rel->swizzle; reg->rel_reg->regnum = rel->rel_regnum; } } @@ -75,26 +75,26 @@ int asmshader_lex(void); BOOL immbool; unsigned int regnum; struct shader_reg reg; - DWORD srcmod; - DWORD writemask; + uint32_t srcmod; + uint32_t writemask; struct { - DWORD writemask; - DWORD idx; - DWORD last; + uint32_t writemask; + uint32_t idx; + uint32_t last; } wm_components; - DWORD swizzle; + uint32_t swizzle; struct { - DWORD swizzle; - DWORD idx; + uint32_t swizzle; + uint32_t idx; } sw_components; - DWORD component; + uint32_t component; struct { - DWORD mod; - DWORD shift; + uint32_t mod; + uint32_t shift; } modshift; enum bwriter_comparison_type comptype; struct { - DWORD dclusage; + uint32_t dclusage; unsigned int regnum; } declaration; enum bwritersampler_texture_type samplertype; @@ -569,7 +569,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3; reg.rel_reg = NULL; reg.srcmod = 0; - reg.u.writemask = BWRITERSP_WRITEMASK_ALL; + reg.writemask = BWRITERSP_WRITEMASK_ALL; asm_ctx.funcs->dcl_output(&asm_ctx, $2.dclusage, $2.regnum, ®); } | INSTR_DCL dclusage REG_OUTPUT writemask @@ -581,7 +581,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3; reg.rel_reg = NULL; reg.srcmod = 0; - reg.u.writemask = $4; + reg.writemask = $4; asm_ctx.funcs->dcl_output(&asm_ctx, $2.dclusage, $2.regnum, ®); } | INSTR_DCL dclusage omods dcl_inputreg @@ -604,7 +604,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $4.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.u.writemask = BWRITERSP_WRITEMASK_ALL; + reg.writemask = BWRITERSP_WRITEMASK_ALL; asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, ®); } | INSTR_DCL dclusage omods dcl_inputreg writemask @@ -627,7 +627,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $4.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.u.writemask = $5; + reg.writemask = $5; asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, ®); } | INSTR_DCL omods dcl_inputreg @@ -649,7 +649,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.u.writemask = BWRITERSP_WRITEMASK_ALL; + reg.writemask = BWRITERSP_WRITEMASK_ALL; asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, ®); } | INSTR_DCL omods dcl_inputreg writemask @@ -671,7 +671,7 @@ instruction: INSTR_ADD omods dreg ',' sregs reg.regnum = $3.regnum; reg.rel_reg = NULL; reg.srcmod = 0; - reg.u.writemask = $4; + reg.writemask = $4; asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, ®); } | INSTR_DCL sampdcl omods REG_SAMPLER @@ -988,7 +988,7 @@ dreg: dreg_name rel_reg { $$.regnum = $1.regnum; $$.type = $1.type; - $$.u.writemask = BWRITERSP_WRITEMASK_ALL; + $$.writemask = BWRITERSP_WRITEMASK_ALL; $$.srcmod = BWRITERSPSM_NONE; set_rel_reg(&$$, &$2); } @@ -996,7 +996,7 @@ dreg: dreg_name rel_reg { $$.regnum = $1.regnum; $$.type = $1.type; - $$.u.writemask = $2; + $$.writemask = $2; $$.srcmod = BWRITERSPSM_NONE; $$.rel_reg = NULL; } @@ -1108,7 +1108,7 @@ writemask: '.' wm_components } else { $$ = $2.writemask; - TRACE("Writemask: %lx\n", $$); + TRACE("Writemask: %x\n", $$); } }
@@ -1136,7 +1136,7 @@ wm_components: COMPONENT swizzle: /* empty */ { $$ = BWRITERVS_NOSWIZZLE; - TRACE("Default swizzle: %08lx\n", $$); + TRACE("Default swizzle: %08x\n", $$); } | '.' sw_components { @@ -1148,7 +1148,7 @@ swizzle: /* empty */ $$ = BWRITERVS_NOSWIZZLE; } else { - DWORD last, i; + uint32_t last, i;
$$ = $2.swizzle; /* Fill the swizzle by extending the last component */ @@ -1156,7 +1156,7 @@ swizzle: /* empty */ for(i = $2.idx; i < 4; i++){ $$ |= last << (2 * i); } - TRACE("Got a swizzle: %08lx\n", $$); + TRACE("Got a swizzle: %08x\n", $$); } }
@@ -1262,7 +1262,7 @@ sreg: sreg_name rel_reg swizzle { $$.type = $1.type; $$.regnum = $1.regnum; - $$.u.swizzle = $3; + $$.swizzle = $3; $$.srcmod = BWRITERSPSM_NONE; set_rel_reg(&$$, &$2); } @@ -1272,7 +1272,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $1.regnum; set_rel_reg(&$$, &$2); $$.srcmod = $3; - $$.u.swizzle = $4; + $$.swizzle = $4; } | '-' sreg_name rel_reg swizzle { @@ -1280,7 +1280,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $2.regnum; $$.srcmod = BWRITERSPSM_NEG; set_rel_reg(&$$, &$3); - $$.u.swizzle = $4; + $$.swizzle = $4; } | '-' sreg_name rel_reg smod swizzle { @@ -1303,9 +1303,9 @@ sreg: sreg_name rel_reg swizzle set_parse_status(&asm_ctx.status, PARSE_ERR); break; default: - FIXME("Unhandled combination of NEGATE and %lu\n", $4); + FIXME("Unhandled combination of NEGATE and %u\n", $4); } - $$.u.swizzle = $5; + $$.swizzle = $5; } | IMMVAL '-' sreg_name rel_reg swizzle { @@ -1319,7 +1319,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $3.regnum; $$.srcmod = BWRITERSPSM_COMP; set_rel_reg(&$$, &$4); - $$.u.swizzle = $5; + $$.swizzle = $5; } | IMMVAL '-' sreg_name rel_reg smod swizzle { @@ -1341,7 +1341,7 @@ sreg: sreg_name rel_reg swizzle $$.regnum = $2.regnum; $$.rel_reg = NULL; $$.srcmod = BWRITERSPSM_NOT; - $$.u.swizzle = $3; + $$.swizzle = $3; }
rel_reg: /* empty */ @@ -1659,7 +1659,7 @@ predicate: '(' REG_PREDICATE swizzle ')' $$.regnum = 0; $$.rel_reg = NULL; $$.srcmod = BWRITERSPSM_NONE; - $$.u.swizzle = $3; + $$.swizzle = $3; } | '(' SMOD_NOT REG_PREDICATE swizzle ')' { @@ -1667,7 +1667,7 @@ predicate: '(' REG_PREDICATE swizzle ')' $$.regnum = 0; $$.rel_reg = NULL; $$.srcmod = BWRITERSPSM_NOT; - $$.u.swizzle = $4; + $$.swizzle = $4; }
%% diff --git a/dlls/d3dcompiler_43/bytecodewriter.c b/dlls/d3dcompiler_43/bytecodewriter.c index 2e5e24ea884..cd4aa4ba11e 100644 --- a/dlls/d3dcompiler_43/bytecodewriter.c +++ b/dlls/d3dcompiler_43/bytecodewriter.c @@ -113,28 +113,34 @@ BOOL add_instruction(struct bwriter_shader *shader, struct instruction *instr) { return TRUE; }
-BOOL add_constF(struct bwriter_shader *shader, DWORD reg, float x, float y, float z, float w) { +BOOL add_constF(struct bwriter_shader *shader, uint32_t reg, float x, float y, float z, float w) +{ struct constant *newconst;
- if(shader->num_cf) { + if (shader->num_cf) + { struct constant **newarray; - newarray = d3dcompiler_realloc(shader->constF, - sizeof(*shader->constF) * (shader->num_cf + 1)); - if(!newarray) { + newarray = d3dcompiler_realloc(shader->constF, sizeof(*shader->constF) * (shader->num_cf + 1)); + if (!newarray) + { ERR("Failed to grow the constants array\n"); return FALSE; } shader->constF = newarray; - } else { + } + else + { shader->constF = d3dcompiler_alloc(sizeof(*shader->constF)); - if(!shader->constF) { + if (!shader->constF) + { ERR("Failed to allocate the constants array\n"); return FALSE; } }
newconst = d3dcompiler_alloc(sizeof(*newconst)); - if(!newconst) { + if (!newconst) + { ERR("Failed to allocate a new constant\n"); return FALSE; } @@ -149,28 +155,34 @@ BOOL add_constF(struct bwriter_shader *shader, DWORD reg, float x, float y, floa return TRUE; }
-BOOL add_constI(struct bwriter_shader *shader, DWORD reg, INT x, INT y, INT z, INT w) { +BOOL add_constI(struct bwriter_shader *shader, uint32_t reg, int x, int y, int z, int w) +{ struct constant *newconst;
- if(shader->num_ci) { + if (shader->num_ci) + { struct constant **newarray; - newarray = d3dcompiler_realloc(shader->constI, - sizeof(*shader->constI) * (shader->num_ci + 1)); - if(!newarray) { + newarray = d3dcompiler_realloc(shader->constI, sizeof(*shader->constI) * (shader->num_ci + 1)); + if (!newarray) + { ERR("Failed to grow the constants array\n"); return FALSE; } shader->constI = newarray; - } else { + } + else + { shader->constI = d3dcompiler_alloc(sizeof(*shader->constI)); - if(!shader->constI) { + if (!shader->constI) + { ERR("Failed to allocate the constants array\n"); return FALSE; } }
newconst = d3dcompiler_alloc(sizeof(*newconst)); - if(!newconst) { + if (!newconst) + { ERR("Failed to allocate a new constant\n"); return FALSE; } @@ -185,28 +197,34 @@ BOOL add_constI(struct bwriter_shader *shader, DWORD reg, INT x, INT y, INT z, I return TRUE; }
-BOOL add_constB(struct bwriter_shader *shader, DWORD reg, BOOL x) { +BOOL add_constB(struct bwriter_shader *shader, uint32_t reg, BOOL x) +{ struct constant *newconst;
- if(shader->num_cb) { + if (shader->num_cb) + { struct constant **newarray; - newarray = d3dcompiler_realloc(shader->constB, - sizeof(*shader->constB) * (shader->num_cb + 1)); - if(!newarray) { + newarray = d3dcompiler_realloc(shader->constB, sizeof(*shader->constB) * (shader->num_cb + 1)); + if (!newarray) + { ERR("Failed to grow the constants array\n"); return FALSE; } shader->constB = newarray; - } else { + } + else + { shader->constB = d3dcompiler_alloc(sizeof(*shader->constB)); - if(!shader->constB) { + if (!shader->constB) + { ERR("Failed to allocate the constants array\n"); return FALSE; } }
newconst = d3dcompiler_alloc(sizeof(*newconst)); - if(!newconst) { + if (!newconst) + { ERR("Failed to allocate a new constant\n"); return FALSE; } @@ -218,41 +236,50 @@ BOOL add_constB(struct bwriter_shader *shader, DWORD reg, BOOL x) { return TRUE; }
-BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, - DWORD usage_idx, DWORD mod, BOOL output, - DWORD regnum, DWORD writemask, BOOL builtin) { - unsigned int *num; +BOOL record_declaration(struct bwriter_shader *shader, uint32_t usage, uint32_t usage_idx, + uint32_t mod, BOOL output, uint32_t regnum, uint32_t writemask, BOOL builtin) +{ struct declaration **decl; - unsigned int i; + unsigned int i, *num;
- if(!shader) return FALSE; + if (!shader) + return FALSE;
- if(output) { + if (output) + { num = &shader->num_outputs; decl = &shader->outputs; - } else { + } + else + { num = &shader->num_inputs; decl = &shader->inputs; }
- if(*num == 0) { + if (*num == 0) + { *decl = d3dcompiler_alloc(sizeof(**decl)); - if(!*decl) { + if (!*decl) + { ERR("Error allocating declarations array\n"); return FALSE; } - } else { + } + else + { struct declaration *newdecl; - for(i = 0; i < *num; i++) { - if((*decl)[i].regnum == regnum && ((*decl)[i].writemask & writemask)) { - WARN("Declaration of register %lu already exists, writemask match %#lx.\n", + + for (i = 0; i < *num; i++) + { + if ((*decl)[i].regnum == regnum && ((*decl)[i].writemask & writemask)) + WARN("Declaration of register %u already exists, writemask match 0x%x\n", regnum, (*decl)[i].writemask & writemask); - } }
newdecl = d3dcompiler_realloc(*decl, sizeof(**decl) * ((*num) + 1)); - if(!newdecl) { + if (!newdecl) + { ERR("Error reallocating declarations array\n"); return FALSE; } @@ -269,32 +296,38 @@ BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, return TRUE; }
-BOOL record_sampler(struct bwriter_shader *shader, DWORD samptype, DWORD mod, DWORD regnum) { +BOOL record_sampler(struct bwriter_shader *shader, uint32_t samptype, uint32_t mod, uint32_t regnum) { unsigned int i;
- if(!shader) return FALSE; + if (!shader) + return FALSE;
- if(shader->num_samplers == 0) { + if (shader->num_samplers == 0) + { shader->samplers = d3dcompiler_alloc(sizeof(*shader->samplers)); - if(!shader->samplers) { + if (!shader->samplers) + { ERR("Error allocating samplers array\n"); return FALSE; } - } else { + } + else + { struct samplerdecl *newarray;
- for(i = 0; i < shader->num_samplers; i++) { - if(shader->samplers[i].regnum == regnum) { - WARN("Sampler %lu already declared.\n", regnum); + for (i = 0; i < shader->num_samplers; i++) + { + if (shader->samplers[i].regnum == regnum) + { + WARN("Sampler %u already declared\n", regnum); /* This is not an error as far as the assembler is concerned. - * Direct3D might refuse to load the compiled shader though - */ + * Direct3D might refuse to load the compiled shader though */ } }
- newarray = d3dcompiler_realloc(shader->samplers, - sizeof(*shader->samplers) * (shader->num_samplers + 1)); - if(!newarray) { + newarray = d3dcompiler_realloc(shader->samplers, sizeof(*shader->samplers) * (shader->num_samplers + 1)); + if (!newarray) + { ERR("Error reallocating samplers array\n"); return FALSE; } @@ -310,7 +343,7 @@ BOOL record_sampler(struct bwriter_shader *shader, DWORD samptype, DWORD mod, DW
struct bytecode_buffer { - DWORD *data; + uint32_t *data; unsigned int size, alloc_size; HRESULT state; }; @@ -329,13 +362,13 @@ struct bytecode_backend void (*srcreg)(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer); void (*dstreg)(struct bc_writer *writer, const struct shader_reg *reg, - struct bytecode_buffer *buffer, DWORD shift, DWORD mod); + struct bytecode_buffer *buffer, uint32_t shift, uint32_t mod); void (*opcode)(struct bc_writer *writer, const struct instruction *instr, - DWORD token, struct bytecode_buffer *buffer); + uint32_t token, struct bytecode_buffer *buffer);
const struct instr_handler_table { - DWORD opcode; + uint32_t opcode; instr_writer func; } *instructions; }; @@ -348,16 +381,16 @@ struct bc_writer HRESULT state;
/* Vertex shader varying mapping. */ - DWORD oPos_regnum, oD_regnum[2], oT_regnum[8], oFog_regnum, oFog_mask, oPts_regnum, oPts_mask; + uint32_t oPos_regnum, oD_regnum[2], oT_regnum[8], oFog_regnum, oFog_mask, oPts_regnum, oPts_mask;
/* Pixel shader varying mapping. */ - DWORD t_regnum[8], v_regnum[2]; + uint32_t t_regnum[8], v_regnum[2]; };
/* shader bytecode buffer manipulation functions. - * allocate_buffer creates a new buffer structure, put_dword adds a new - * DWORD to the buffer. In the rare case of a memory allocation failure + * allocate_buffer creates a new buffer structure, put_u32 adds a new + * uint32_t to the buffer. In the rare case of a memory allocation failure * when trying to grow the buffer a flag is set in the buffer to mark it * invalid. This avoids return value checking and passing in many places */ @@ -370,8 +403,10 @@ static struct bytecode_buffer *allocate_buffer(void) { return ret; }
-static void put_dword(struct bytecode_buffer *buffer, DWORD value) { - if(FAILED(buffer->state)) return; +static void put_u32(struct bytecode_buffer *buffer, uint32_t value) +{ + if (FAILED(buffer->state)) + return;
if (!array_reserve((void **)&buffer->data, &buffer->alloc_size, buffer->size + 1, sizeof(*buffer->data))) { @@ -384,7 +419,7 @@ static void put_dword(struct bytecode_buffer *buffer, DWORD value) {
/* bwriter -> d3d9 conversion functions. */
-static DWORD sm1_version(const struct bwriter_shader *shader) +static uint32_t sm1_version(const struct bwriter_shader *shader) { switch (shader->type) { @@ -398,9 +433,9 @@ static DWORD sm1_version(const struct bwriter_shader *shader) } }
-static DWORD d3d9_swizzle(DWORD bwriter_swizzle) +static uint32_t d3d9_swizzle(uint32_t bwriter_swizzle) { - DWORD ret = 0; + uint32_t ret = 0;
if ((bwriter_swizzle & BWRITERVS_X_X) == BWRITERVS_X_X) ret |= D3DVS_X_X; if ((bwriter_swizzle & BWRITERVS_X_Y) == BWRITERVS_X_Y) ret |= D3DVS_X_Y; @@ -425,9 +460,9 @@ static DWORD d3d9_swizzle(DWORD bwriter_swizzle) return ret; }
-static DWORD d3d9_writemask(DWORD bwriter_writemask) +static uint32_t d3d9_writemask(uint32_t bwriter_writemask) { - DWORD ret = 0; + uint32_t ret = 0;
if (bwriter_writemask & BWRITERSP_WRITEMASK_0) ret |= D3DSP_WRITEMASK_0; if (bwriter_writemask & BWRITERSP_WRITEMASK_1) ret |= D3DSP_WRITEMASK_1; @@ -437,7 +472,7 @@ static DWORD d3d9_writemask(DWORD bwriter_writemask) return ret; }
-static DWORD d3d9_srcmod(DWORD bwriter_srcmod) +static uint32_t d3d9_srcmod(uint32_t bwriter_srcmod) { switch (bwriter_srcmod) { @@ -456,14 +491,14 @@ static DWORD d3d9_srcmod(DWORD bwriter_srcmod) case BWRITERSPSM_ABSNEG: return D3DSPSM_ABSNEG; case BWRITERSPSM_NOT: return D3DSPSM_NOT; default: - FIXME("Unhandled BWRITERSPSM token %#lx.\n", bwriter_srcmod); + FIXME("Unhandled BWRITERSPSM token %#x.\n", bwriter_srcmod); return 0; } }
-static DWORD d3d9_dstmod(DWORD bwriter_mod) +static uint32_t d3d9_dstmod(uint32_t bwriter_mod) { - DWORD ret = 0; + uint32_t ret = 0;
if (bwriter_mod & BWRITERSPDM_SATURATE) ret |= D3DSPDM_SATURATE; if (bwriter_mod & BWRITERSPDM_PARTIALPRECISION) ret |= D3DSPDM_PARTIALPRECISION; @@ -472,7 +507,7 @@ static DWORD d3d9_dstmod(DWORD bwriter_mod) return ret; }
-static DWORD d3d9_comparetype(DWORD asmshader_comparetype) +static uint32_t d3d9_comparetype(uint32_t asmshader_comparetype) { switch (asmshader_comparetype) { @@ -483,24 +518,24 @@ static DWORD d3d9_comparetype(DWORD asmshader_comparetype) case BWRITER_COMPARISON_NE: return D3DSPC_NE; case BWRITER_COMPARISON_LE: return D3DSPC_LE; default: - FIXME("Unexpected BWRITER_COMPARISON type %#lx.\n", asmshader_comparetype); + FIXME("Unexpected BWRITER_COMPARISON type %#x.\n", asmshader_comparetype); return 0; } }
-static DWORD d3d9_sampler(DWORD bwriter_sampler) +static uint32_t d3d9_sampler(uint32_t bwriter_sampler) { if (bwriter_sampler == BWRITERSTT_UNKNOWN) return D3DSTT_UNKNOWN; if (bwriter_sampler == BWRITERSTT_1D) return D3DSTT_1D; if (bwriter_sampler == BWRITERSTT_2D) return D3DSTT_2D; if (bwriter_sampler == BWRITERSTT_CUBE) return D3DSTT_CUBE; if (bwriter_sampler == BWRITERSTT_VOLUME) return D3DSTT_VOLUME; - FIXME("Unexpected BWRITERSAMPLER_TEXTURE_TYPE type %#lx.\n", bwriter_sampler); + FIXME("Unexpected BWRITERSAMPLER_TEXTURE_TYPE type %#x.\n", bwriter_sampler);
return 0; }
-static DWORD d3d9_register(DWORD bwriter_register) +static uint32_t d3d9_register(uint32_t bwriter_register) { if (bwriter_register == BWRITERSPR_TEMP) return D3DSPR_TEMP; if (bwriter_register == BWRITERSPR_INPUT) return D3DSPR_INPUT; @@ -521,11 +556,11 @@ static DWORD d3d9_register(DWORD bwriter_register) if (bwriter_register == BWRITERSPR_LABEL) return D3DSPR_LABEL; if (bwriter_register == BWRITERSPR_PREDICATE) return D3DSPR_PREDICATE;
- FIXME("Unexpected BWRITERSPR %#lx.\n", bwriter_register); + FIXME("Unexpected BWRITERSPR %#x.\n", bwriter_register); return ~0U; }
-static DWORD d3d9_opcode(DWORD bwriter_opcode) +static uint32_t d3d9_opcode(uint32_t bwriter_opcode) { switch (bwriter_opcode) { @@ -620,12 +655,12 @@ static DWORD d3d9_opcode(DWORD bwriter_opcode) case BWRITERSIO_TEXLDB: return D3DSIO_TEX | D3DSI_TEXLD_BIAS;
default: - FIXME("Unhandled BWRITERSIO token %#lx.\n", bwriter_opcode); + FIXME("Unhandled BWRITERSIO token %#x.\n", bwriter_opcode); return ~0U; } }
-static DWORD d3dsp_register( D3DSHADER_PARAM_REGISTER_TYPE type, DWORD num ) +static uint32_t d3dsp_register(D3DSHADER_PARAM_REGISTER_TYPE type, uint32_t num) { return ((type << D3DSP_REGTYPE_SHIFT) & D3DSP_REGTYPE_MASK) | ((type << D3DSP_REGTYPE_SHIFT2) & D3DSP_REGTYPE_MASK2) | @@ -635,43 +670,44 @@ static DWORD d3dsp_register( D3DSHADER_PARAM_REGISTER_TYPE type, DWORD num ) /****************************************************** * Implementation of the writer functions starts here * ******************************************************/ -static void write_declarations(struct bc_writer *This, struct bytecode_buffer *buffer, - const struct declaration *decls, unsigned int num, DWORD type) +static void write_declarations(struct bc_writer *writer, struct bytecode_buffer *buffer, + const struct declaration *decls, unsigned int num, uint32_t type) { - DWORD i; - DWORD instr_dcl = D3DSIO_DCL; - DWORD token; + uint32_t instr_dcl = D3DSIO_DCL; + uint32_t token; + unsigned int i; struct shader_reg reg;
ZeroMemory(®, sizeof(reg));
- if (This->shader->major_version > 1) + if (writer->shader->major_version > 1) instr_dcl |= 2 << D3DSI_INSTLENGTH_SHIFT;
for(i = 0; i < num; i++) { if(decls[i].builtin) continue;
/* Write the DCL instruction */ - put_dword(buffer, instr_dcl); + put_u32(buffer, instr_dcl);
/* Write the usage and index */ token = (1u << 31); /* Bit 31 of non-instruction opcodes is 1 */ token |= (decls[i].usage << D3DSP_DCL_USAGE_SHIFT) & D3DSP_DCL_USAGE_MASK; token |= (decls[i].usage_idx << D3DSP_DCL_USAGEINDEX_SHIFT) & D3DSP_DCL_USAGEINDEX_MASK; - put_dword(buffer, token); + put_u32(buffer, token);
/* Write the dest register */ reg.type = type; reg.regnum = decls[i].regnum; - reg.u.writemask = decls[i].writemask; - This->funcs->dstreg(This, ®, buffer, 0, decls[i].mod); + reg.writemask = decls[i].writemask; + writer->funcs->dstreg(writer, ®, buffer, 0, decls[i].mod); } }
-static void write_const(struct constant **consts, int num, DWORD opcode, DWORD reg_type, struct bytecode_buffer *buffer, BOOL len) { - int i; - DWORD instr_def = opcode; - const DWORD reg = (1u << 31) | d3dsp_register( reg_type, 0 ) | D3DSP_WRITEMASK_ALL; +static void write_const(struct constant **consts, int num, uint32_t opcode, uint32_t reg_type, struct bytecode_buffer *buffer, BOOL len) +{ + const uint32_t reg = (1u << 31) | d3dsp_register( reg_type, 0 ) | D3DSP_WRITEMASK_ALL; + uint32_t instr_def = opcode; + unsigned int i;
if(len) { if(opcode == D3DSIO_DEFB) @@ -682,14 +718,14 @@ static void write_const(struct constant **consts, int num, DWORD opcode, DWORD r
for(i = 0; i < num; i++) { /* Write the DEF instruction */ - put_dword(buffer, instr_def); + put_u32(buffer, instr_def);
- put_dword(buffer, reg | (consts[i]->regnum & D3DSP_REGNUM_MASK)); - put_dword(buffer, consts[i]->value[0].d); + put_u32(buffer, reg | (consts[i]->regnum & D3DSP_REGNUM_MASK)); + put_u32(buffer, consts[i]->value[0].d); if(opcode != D3DSIO_DEFB) { - put_dword(buffer, consts[i]->value[1].d); - put_dword(buffer, consts[i]->value[2].d); - put_dword(buffer, consts[i]->value[3].d); + put_u32(buffer, consts[i]->value[1].d); + put_u32(buffer, consts[i]->value[2].d); + put_u32(buffer, consts[i]->value[3].d); } } } @@ -699,85 +735,97 @@ static void write_constF(const struct bwriter_shader *shader, struct bytecode_bu }
/* This function looks for VS 1/2 registers mapping to VS 3 output registers */ -static HRESULT vs_find_builtin_varyings(struct bc_writer *This, const struct bwriter_shader *shader) { - DWORD i; - DWORD usage, usage_idx, writemask, regnum; +static HRESULT vs_find_builtin_varyings(struct bc_writer *writer, const struct bwriter_shader *shader) +{ + uint32_t usage, usage_idx, writemask, regnum; + unsigned int i;
- for(i = 0; i < shader->num_outputs; i++) { - if(!shader->outputs[i].builtin) continue; + for (i = 0; i < shader->num_outputs; i++) + { + if (!shader->outputs[i].builtin) + continue;
usage = shader->outputs[i].usage; usage_idx = shader->outputs[i].usage_idx; writemask = shader->outputs[i].writemask; regnum = shader->outputs[i].regnum;
- switch(usage) { + switch (usage) + { case BWRITERDECLUSAGE_POSITION: case BWRITERDECLUSAGE_POSITIONT: - if(usage_idx > 0) { - WARN("dcl_position%lu not supported in sm 1/2 shaders.\n", usage_idx); + if (usage_idx > 0) + { + WARN("dcl_position%u not supported in sm 1/2 shaders.\n", usage_idx); return E_INVALIDARG; } - TRACE("o%lu is oPos.\n", regnum); - This->oPos_regnum = regnum; + TRACE("o%u is oPos.\n", regnum); + writer->oPos_regnum = regnum; break;
case BWRITERDECLUSAGE_COLOR: - if(usage_idx > 1) { - WARN("dcl_color%lu not supported in sm 1/2 shaders.\n", usage_idx); + if (usage_idx > 1) + { + WARN("dcl_color%u not supported in sm 1/2 shaders.\n", usage_idx); return E_INVALIDARG; } - if(writemask != BWRITERSP_WRITEMASK_ALL) { + if (writemask != BWRITERSP_WRITEMASK_ALL) + { WARN("Only WRITEMASK_ALL is supported on color in sm 1/2\n"); return E_INVALIDARG; } - TRACE("o%lu is oD%lu.\n", regnum, usage_idx); - This->oD_regnum[usage_idx] = regnum; + TRACE("o%u is oD%u.\n", regnum, usage_idx); + writer->oD_regnum[usage_idx] = regnum; break;
case BWRITERDECLUSAGE_TEXCOORD: - if(usage_idx >= 8) { - WARN("dcl_color%lu not supported in sm 1/2 shaders.\n", usage_idx); + if (usage_idx >= 8) + { + WARN("dcl_color%u not supported in sm 1/2 shaders.\n", usage_idx); return E_INVALIDARG; } - if(writemask != (BWRITERSP_WRITEMASK_0) && - writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1) && - writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1 | BWRITERSP_WRITEMASK_2) && - writemask != (BWRITERSP_WRITEMASK_ALL)) { + if (writemask != (BWRITERSP_WRITEMASK_0) + && writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1) + && writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1 | BWRITERSP_WRITEMASK_2) + && writemask != (BWRITERSP_WRITEMASK_ALL)) + { WARN("Partial writemasks not supported on texture coordinates in sm 1 and 2\n"); return E_INVALIDARG; } - TRACE("o%lu is oT%lu.\n", regnum, usage_idx); - This->oT_regnum[usage_idx] = regnum; + TRACE("o%u is oT%u.\n", regnum, usage_idx); + writer->oT_regnum[usage_idx] = regnum; break;
case BWRITERDECLUSAGE_PSIZE: - if(usage_idx > 0) { - WARN("dcl_psize%lu not supported in sm 1/2 shaders.\n", usage_idx); + if (usage_idx > 0) + { + WARN("dcl_psize%u not supported in sm 1/2 shaders.\n", usage_idx); return E_INVALIDARG; } - TRACE("o%lu writemask 0x%08lx is oPts.\n", regnum, writemask); - This->oPts_regnum = regnum; - This->oPts_mask = writemask; + TRACE("o%u writemask 0x%08x is oPts.\n", regnum, writemask); + writer->oPts_regnum = regnum; + writer->oPts_mask = writemask; break;
case BWRITERDECLUSAGE_FOG: - if(usage_idx > 0) { - WARN("dcl_fog%lu not supported in sm 1 shaders.\n", usage_idx); + if (usage_idx > 0) + { + WARN("dcl_fog%u not supported in sm 1 shaders.\n", usage_idx); return E_INVALIDARG; } - if(writemask != BWRITERSP_WRITEMASK_0 && writemask != BWRITERSP_WRITEMASK_1 && - writemask != BWRITERSP_WRITEMASK_2 && writemask != BWRITERSP_WRITEMASK_3) { + if (writemask != BWRITERSP_WRITEMASK_0 && writemask != BWRITERSP_WRITEMASK_1 + && writemask != BWRITERSP_WRITEMASK_2 && writemask != BWRITERSP_WRITEMASK_3) + { WARN("Unsupported fog writemask\n"); return E_INVALIDARG; } - TRACE("o%lu writemask 0x%08lx is oFog.\n", regnum, writemask); - This->oFog_regnum = regnum; - This->oFog_mask = writemask; + TRACE("o%u writemask 0x%08x is oFog.\n", regnum, writemask); + writer->oFog_regnum = regnum; + writer->oFog_mask = writemask; break;
default: - WARN("Varying type %lu is not supported in shader model 1.x.\n", usage); + WARN("Varying type %u is not supported in shader model 1.x.\n", usage); return E_INVALIDARG; } } @@ -805,56 +853,63 @@ static void vs_1_x_header(struct bc_writer *This, const struct bwriter_shader *s write_constF(shader, buffer, FALSE); }
-static HRESULT find_ps_builtin_semantics(struct bc_writer *This, - const struct bwriter_shader *shader, - DWORD texcoords) { - DWORD i; - DWORD usage, usage_idx, writemask, regnum; +static HRESULT find_ps_builtin_semantics(struct bc_writer *writer, const struct bwriter_shader *shader, + uint32_t texcoords) +{ + uint32_t usage, usage_idx, writemask, regnum; + unsigned int i;
- This->v_regnum[0] = -1; This->v_regnum[1] = -1; - for(i = 0; i < 8; i++) This->t_regnum[i] = -1; + writer->v_regnum[0] = -1; + writer->v_regnum[1] = -1; + for (i = 0; i < 8; i++) + writer->t_regnum[i] = -1;
- for(i = 0; i < shader->num_inputs; i++) { - if(!shader->inputs[i].builtin) continue; + for (i = 0; i < shader->num_inputs; i++) + { + if (!shader->inputs[i].builtin) + continue;
usage = shader->inputs[i].usage; usage_idx = shader->inputs[i].usage_idx; writemask = shader->inputs[i].writemask; regnum = shader->inputs[i].regnum;
- switch(usage) { + switch (usage) + { case BWRITERDECLUSAGE_COLOR: - if(usage_idx > 1) { - WARN("dcl_color%lu not supported in sm 1 shaders\n", usage_idx); + if (usage_idx > 1) + { + WARN("dcl_color%u not supported in sm 1 shaders\n", usage_idx); return E_INVALIDARG; } - if(writemask != BWRITERSP_WRITEMASK_ALL) { + if (writemask != BWRITERSP_WRITEMASK_ALL) + { WARN("Only WRITEMASK_ALL is supported on color in sm 1\n"); return E_INVALIDARG; } - TRACE("v%lu is v%lu\n", regnum, usage_idx); - This->v_regnum[usage_idx] = regnum; + TRACE("v%u is v%u\n", regnum, usage_idx); + writer->v_regnum[usage_idx] = regnum; break;
case BWRITERDECLUSAGE_TEXCOORD: - if(usage_idx > texcoords) { - WARN("dcl_texcoord%lu not supported in this shader version\n", usage_idx); + if (usage_idx > texcoords) + { + WARN("dcl_texcoord%u not supported in this shader version\n", usage_idx); return E_INVALIDARG; } - if(writemask != (BWRITERSP_WRITEMASK_0) && - writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1) && - writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1 | BWRITERSP_WRITEMASK_2) && - writemask != (BWRITERSP_WRITEMASK_ALL)) { + if (writemask != (BWRITERSP_WRITEMASK_0) + && writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1) + && writemask != (BWRITERSP_WRITEMASK_0 | BWRITERSP_WRITEMASK_1 | BWRITERSP_WRITEMASK_2) + && writemask != (BWRITERSP_WRITEMASK_ALL)) WARN("Partial writemasks not supported on texture coordinates in sm 1 and 2\n"); - } else { + else writemask = BWRITERSP_WRITEMASK_ALL; - } - TRACE("v%lu is t%lu\n", regnum, usage_idx); - This->t_regnum[usage_idx] = regnum; + TRACE("v%u is t%u\n", regnum, usage_idx); + writer->t_regnum[usage_idx] = regnum; break;
default: - WARN("Varying type %lu is not supported in shader model 1.x\n", usage); + WARN("Varying type %u is not supported in shader model 1.x\n", usage); return E_INVALIDARG; } } @@ -901,59 +956,66 @@ static void ps_1_4_header(struct bc_writer *This, const struct bwriter_shader *s write_constF(shader, buffer, FALSE); }
-static void end(struct bc_writer *This, const struct bwriter_shader *shader, struct bytecode_buffer *buffer) { - put_dword(buffer, D3DSIO_END); +static void end(struct bc_writer *writer, const struct bwriter_shader *shader, struct bytecode_buffer *buffer) +{ + put_u32(buffer, D3DSIO_END); }
-static DWORD map_vs_output(struct bc_writer *This, DWORD regnum, DWORD mask, DWORD *has_components) { - DWORD i; +static uint32_t map_vs_output(struct bc_writer *writer, uint32_t regnum, uint32_t mask, BOOL *has_components) +{ + unsigned int i;
*has_components = TRUE; - if(regnum == This->oPos_regnum) { + if (regnum == writer->oPos_regnum) + { return d3dsp_register( D3DSPR_RASTOUT, D3DSRO_POSITION ); } - if(regnum == This->oFog_regnum && mask == This->oFog_mask) { + if (regnum == writer->oFog_regnum && mask == writer->oFog_mask) + { *has_components = FALSE; return d3dsp_register( D3DSPR_RASTOUT, D3DSRO_FOG ) | D3DSP_WRITEMASK_ALL; } - if(regnum == This->oPts_regnum && mask == This->oPts_mask) { + if (regnum == writer->oPts_regnum && mask == writer->oPts_mask) + { *has_components = FALSE; return d3dsp_register( D3DSPR_RASTOUT, D3DSRO_POINT_SIZE ) | D3DSP_WRITEMASK_ALL; } - for(i = 0; i < 2; i++) { - if(regnum == This->oD_regnum[i]) { + for (i = 0; i < 2; i++) + { + if (regnum == writer->oD_regnum[i]) return d3dsp_register( D3DSPR_ATTROUT, i ); - } } - for(i = 0; i < 8; i++) { - if(regnum == This->oT_regnum[i]) { + for (i = 0; i < 8; i++) + { + if (regnum == writer->oT_regnum[i]) return d3dsp_register( D3DSPR_TEXCRDOUT, i ); - } }
/* The varying must be undeclared - if an unsupported varying was declared, * the vs_find_builtin_varyings function would have caught it and this code * would not run */ - WARN("Undeclared varying %lu.\n", regnum); - This->state = E_INVALIDARG; + WARN("Undeclared varying %u.\n", regnum); + writer->state = E_INVALIDARG; return -1; }
-static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg, - struct bytecode_buffer *buffer, - DWORD shift, DWORD mod) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - DWORD has_wmask; +static void vs_12_dstreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer, + uint32_t shift, uint32_t mod) +{ + uint32_t token = (1u << 31); /* Bit 31 of registers is 1 */ + BOOL has_wmask;
- if(reg->rel_reg) { + if (reg->rel_reg) + { WARN("Relative addressing not supported for destination registers\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_OUTPUT: - token |= map_vs_output(This, reg->regnum, reg->u.writemask, &has_wmask); + token |= map_vs_output(writer, reg->regnum, reg->writemask, &has_wmask); break;
case BWRITERSPR_RASTOUT: @@ -961,7 +1023,7 @@ static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg, /* These registers are mapped to input and output regs. They can be encoded in the bytecode, * but are unexpected. If we hit this path it might be due to an error. */ - FIXME("Unexpected register type %lu.\n", reg->type); + FIXME("Unexpected register type %u.\n", reg->type); /* drop through */ case BWRITERSPR_INPUT: case BWRITERSPR_TEMP: @@ -971,9 +1033,10 @@ static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg, break;
case BWRITERSPR_ADDR: - if(reg->regnum != 0) { + if (reg->regnum != 0) + { WARN("Only a0 exists\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } token |= d3dsp_register( D3DSPR_ADDR, 0 ); @@ -981,15 +1044,16 @@ static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg, break;
case BWRITERSPR_PREDICATE: - if (This->shader->major_version != 2 || This->shader->minor_version != 1) + if (writer->shader->major_version != 2 || writer->shader->minor_version != 1) { WARN("Predicate register is allowed only in vs_2_x\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } - if(reg->regnum != 0) { + if (reg->regnum != 0) + { WARN("Only predicate register p0 exists\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } token |= d3dsp_register( D3DSPR_PREDICATE, 0 ); @@ -998,7 +1062,7 @@ static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg,
default: WARN("Invalid register type for 1.x-2.x vertex shader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
@@ -1009,24 +1073,24 @@ static void vs_12_dstreg(struct bc_writer *This, const struct shader_reg *reg, token |= (shift << D3DSP_DSTSHIFT_SHIFT) & D3DSP_DSTSHIFT_MASK; token |= d3d9_dstmod(mod);
- if(has_wmask) { - token |= d3d9_writemask(reg->u.writemask); - } - put_dword(buffer, token); + if (has_wmask) + token |= d3d9_writemask(reg->writemask); + put_u32(buffer, token); }
-static void vs_1_x_srcreg(struct bc_writer *This, const struct shader_reg *reg, - struct bytecode_buffer *buffer) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - DWORD has_swizzle; - DWORD component; +static void vs_1_x_srcreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer) +{ + uint32_t token = (1u << 31); /* Bit 31 of registers is 1 */ + uint32_t component; + BOOL has_swizzle;
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_OUTPUT: - /* Map the swizzle to a writemask, the format expected - by map_vs_output - */ - switch(reg->u.swizzle) { + /* Map the swizzle to a writemask, the format expected by + * map_vs_output */ + switch (reg->swizzle) + { case BWRITERVS_SWIZZLE_X: component = BWRITERSP_WRITEMASK_0; break; @@ -1042,27 +1106,28 @@ static void vs_1_x_srcreg(struct bc_writer *This, const struct shader_reg *reg, default: component = 0; } - token |= map_vs_output(This, reg->regnum, component, &has_swizzle); + token |= map_vs_output(writer, reg->regnum, component, &has_swizzle); break;
case BWRITERSPR_RASTOUT: case BWRITERSPR_ATTROUT: - /* These registers are mapped to input and output regs. They can be encoded in the bytecode, - * but are unexpected. If we hit this path it might be due to an error. - */ - FIXME("Unexpected register type %lu.\n", reg->type); + /* These registers are mapped to input and output regs. They can + * be encoded in the bytecode, but are unexpected. If we hit this + * path it might be due to an error. */ + FIXME("Unexpected register type %u.\n", reg->type); /* drop through */ case BWRITERSPR_INPUT: case BWRITERSPR_TEMP: case BWRITERSPR_CONST: case BWRITERSPR_ADDR: - token |= d3dsp_register( reg->type, reg->regnum ); - if(reg->rel_reg) { - if(reg->rel_reg->type != BWRITERSPR_ADDR || - reg->rel_reg->regnum != 0 || - reg->rel_reg->u.swizzle != BWRITERVS_SWIZZLE_X) { + token |= d3dsp_register(reg->type, reg->regnum); + if (reg->rel_reg) + { + if (reg->rel_reg->type != BWRITERSPR_ADDR || reg->rel_reg->regnum != 0 + || reg->rel_reg->swizzle != BWRITERVS_SWIZZLE_X) + { WARN("Relative addressing in vs_1_x is only allowed with a0.x\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } token |= D3DVS_ADDRMODE_RELATIVE & D3DVS_ADDRESSMODE_MASK; @@ -1071,73 +1136,76 @@ static void vs_1_x_srcreg(struct bc_writer *This, const struct shader_reg *reg,
default: WARN("Invalid register type for 1.x vshader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */
token |= d3d9_srcmod(reg->srcmod); - put_dword(buffer, token); + put_u32(buffer, token); }
-static void write_srcregs(struct bc_writer *This, const struct instruction *instr, - struct bytecode_buffer *buffer){ +static void write_srcregs(struct bc_writer *writer, const struct instruction *instr, struct bytecode_buffer *buffer) +{ unsigned int i; - if(instr->has_predicate){ - This->funcs->srcreg(This, &instr->predicate, buffer); - } - for(i = 0; i < instr->num_srcs; i++){ - This->funcs->srcreg(This, &instr->src[i], buffer); - } + + if (instr->has_predicate) + writer->funcs->srcreg(writer, &instr->predicate, buffer); + + for (i = 0; i < instr->num_srcs; ++i) + writer->funcs->srcreg(writer, &instr->src[i], buffer); }
-static DWORD map_ps13_temp(struct bc_writer *This, const struct shader_reg *reg) { - if(reg->regnum == T0_REG) { - return d3dsp_register( D3DSPR_TEXTURE, 0 ); - } else if(reg->regnum == T1_REG) { - return d3dsp_register( D3DSPR_TEXTURE, 1 ); - } else if(reg->regnum == T2_REG) { - return d3dsp_register( D3DSPR_TEXTURE, 2 ); - } else if(reg->regnum == T3_REG) { - return d3dsp_register( D3DSPR_TEXTURE, 3 ); - } else { - return d3dsp_register( D3DSPR_TEMP, reg->regnum ); - } +static uint32_t map_ps13_temp(struct bc_writer *writer, const struct shader_reg *reg) +{ + if (reg->regnum == T0_REG) + return d3dsp_register(D3DSPR_TEXTURE, 0); + if (reg->regnum == T1_REG) + return d3dsp_register(D3DSPR_TEXTURE, 1); + if(reg->regnum == T2_REG) + return d3dsp_register(D3DSPR_TEXTURE, 2); + if (reg->regnum == T3_REG) + return d3dsp_register(D3DSPR_TEXTURE, 3); + return d3dsp_register(D3DSPR_TEMP, reg->regnum); }
-static DWORD map_ps_input(struct bc_writer *This, - const struct shader_reg *reg) { - DWORD i; +static uint32_t map_ps_input(struct bc_writer *writer, const struct shader_reg *reg) +{ + unsigned int i; + /* Map color interpolators */ - for(i = 0; i < 2; i++) { - if(reg->regnum == This->v_regnum[i]) { - return d3dsp_register( D3DSPR_INPUT, i ); - } + for (i = 0; i < ARRAY_SIZE(writer->v_regnum); ++i) + { + if (reg->regnum == writer->v_regnum[i]) + return d3dsp_register(D3DSPR_INPUT, i); } - for(i = 0; i < 8; i++) { - if(reg->regnum == This->t_regnum[i]) { - return d3dsp_register( D3DSPR_TEXTURE, i ); - } + for (i = 0; i < ARRAY_SIZE(writer->t_regnum); ++i) + { + if(reg->regnum == writer->t_regnum[i]) + return d3dsp_register(D3DSPR_TEXTURE, i); }
WARN("Invalid ps 1/2 varying\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return 0; }
-static void ps_1_0123_srcreg(struct bc_writer *This, const struct shader_reg *reg, - struct bytecode_buffer *buffer) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - if(reg->rel_reg) { +static void ps_1_0123_srcreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer) +{ + uint32_t token = 1u << 31; + + if (reg->rel_reg) + { WARN("Relative addressing not supported in <= ps_3_0\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_INPUT: - token |= map_ps_input(This, reg); + token |= map_ps_input(writer, reg); break;
/* Take care about the texture temporaries. There's a problem: They aren't @@ -1145,7 +1213,7 @@ static void ps_1_0123_srcreg(struct bc_writer *This, const struct shader_reg *re * to map ps_1_3 shaders to the common shader structure */ case BWRITERSPR_TEMP: - token |= map_ps13_temp(This, reg); + token |= map_ps13_temp(writer, reg); break;
case BWRITERSPR_CONST: /* Can be mapped 1:1 */ @@ -1154,92 +1222,93 @@ static void ps_1_0123_srcreg(struct bc_writer *This, const struct shader_reg *re
default: WARN("Invalid register type for <= ps_1_3 shader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */
- if(reg->srcmod == BWRITERSPSM_DZ || reg->srcmod == BWRITERSPSM_DW || - reg->srcmod == BWRITERSPSM_ABS || reg->srcmod == BWRITERSPSM_ABSNEG || - reg->srcmod == BWRITERSPSM_NOT) { - WARN("Invalid source modifier %lu for <= ps_1_3.\n", reg->srcmod); - This->state = E_INVALIDARG; + if(reg->srcmod == BWRITERSPSM_DZ || reg->srcmod == BWRITERSPSM_DW + || reg->srcmod == BWRITERSPSM_ABS || reg->srcmod == BWRITERSPSM_ABSNEG + || reg->srcmod == BWRITERSPSM_NOT) + { + WARN("Invalid source modifier %u for <= ps_1_3\n", reg->srcmod); + writer->state = E_INVALIDARG; return; } token |= d3d9_srcmod(reg->srcmod); - put_dword(buffer, token); + put_u32(buffer, token); }
-static void ps_1_0123_dstreg(struct bc_writer *This, const struct shader_reg *reg, - struct bytecode_buffer *buffer, - DWORD shift, DWORD mod) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ +static void ps_1_0123_dstreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer, + uint32_t shift, uint32_t mod) +{ + uint32_t token = (1u << 31); /* Bit 31 of registers is 1 */
- if(reg->rel_reg) { + if (reg->rel_reg) + { WARN("Relative addressing not supported for destination registers\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_TEMP: - token |= map_ps13_temp(This, reg); + token |= map_ps13_temp(writer, reg); break;
/* texkill uses the input register as a destination parameter */ case BWRITERSPR_INPUT: - token |= map_ps_input(This, reg); + token |= map_ps_input(writer, reg); break;
default: WARN("Invalid dest register type for 1.x pshader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
token |= (shift << D3DSP_DSTSHIFT_SHIFT) & D3DSP_DSTSHIFT_MASK; token |= d3d9_dstmod(mod);
- token |= d3d9_writemask(reg->u.writemask); - put_dword(buffer, token); + token |= d3d9_writemask(reg->writemask); + put_u32(buffer, token); }
/* The length of an instruction consists of the destination register (if any), * the number of source registers, the number of address registers used for - * indirect addressing, and optionally the predicate register - */ -static DWORD instrlen(const struct instruction *instr, unsigned int srcs, unsigned int dsts) { + * indirect addressing, and optionally the predicate register */ +static unsigned int instrlen(const struct instruction *instr, unsigned int srcs, unsigned int dsts) +{ + unsigned int ret = srcs + dsts + (instr->has_predicate ? 1 : 0); unsigned int i; - DWORD ret = srcs + dsts + (instr->has_predicate ? 1 : 0);
- if(dsts){ - if(instr->dst.rel_reg) ret++; - } - for(i = 0; i < srcs; i++) { - if(instr->src[i].rel_reg) ret++; - } + if (dsts && instr->dst.rel_reg) + ++ret; + for (i = 0; i < srcs; ++i) + if (instr->src[i].rel_reg) + ++ret; return ret; }
-static void sm_1_x_opcode(struct bc_writer *This, - const struct instruction *instr, - DWORD token, struct bytecode_buffer *buffer) { - /* In sm_1_x instruction length isn't encoded */ - if(instr->coissue){ +static void sm_1_x_opcode(struct bc_writer *writer, const struct instruction *instr, uint32_t token, + struct bytecode_buffer *buffer) +{ + /* Instruction length isn't encoded in sm_1_x. */ + if (instr->coissue) token |= D3DSI_COISSUE; - } - put_dword(buffer, token); + put_u32(buffer, token); }
-static void instr_handler(struct bc_writer *This, - const struct instruction *instr, - struct bytecode_buffer *buffer) { - DWORD token = d3d9_opcode(instr->opcode); +static void instr_handler(struct bc_writer *writer, const struct instruction *instr, struct bytecode_buffer *buffer) +{ + uint32_t token = d3d9_opcode(instr->opcode);
- This->funcs->opcode(This, instr, token, buffer); - if(instr->has_dst) This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod); - write_srcregs(This, instr, buffer); + writer->funcs->opcode(writer, instr, token, buffer); + if (instr->has_dst) + writer->funcs->dstreg(writer, &instr->dst, buffer, instr->shift, instr->dstmod); + write_srcregs(writer, instr, buffer); }
static const struct instr_handler_table vs_1_x_handlers[] = { @@ -1283,113 +1352,131 @@ static const struct bytecode_backend vs_1_x_backend = { vs_1_x_handlers };
-static void instr_ps_1_0123_texld(struct bc_writer *This, - const struct instruction *instr, - struct bytecode_buffer *buffer) { - DWORD idx; +static void instr_ps_1_0123_texld(struct bc_writer *writer, const struct instruction *instr, + struct bytecode_buffer *buffer) +{ struct shader_reg reg; - DWORD swizzlemask; + uint32_t swizzlemask; + uint32_t idx;
- if(instr->src[1].type != BWRITERSPR_SAMPLER || - instr->src[1].regnum > 3) { - WARN("Unsupported sampler type %lu regnum %lu.\n", - instr->src[1].type, instr->src[1].regnum); - This->state = E_INVALIDARG; + if (instr->src[1].type != BWRITERSPR_SAMPLER || instr->src[1].regnum > 3) + { + WARN("Unsupported sampler type %u regnum %u.\n", instr->src[1].type, instr->src[1].regnum); + writer->state = E_INVALIDARG; return; - } else if(instr->dst.type != BWRITERSPR_TEMP) { + } + else if (instr->dst.type != BWRITERSPR_TEMP) + { WARN("Can only sample into a temp register\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
idx = instr->src[1].regnum; - if((idx == 0 && instr->dst.regnum != T0_REG) || - (idx == 1 && instr->dst.regnum != T1_REG) || - (idx == 2 && instr->dst.regnum != T2_REG) || - (idx == 3 && instr->dst.regnum != T3_REG)) { - WARN("Sampling from sampler s%lu to register r%lu is not possible in ps_1_x.\n", - idx, instr->dst.regnum); - This->state = E_INVALIDARG; + if ((idx == 0 && instr->dst.regnum != T0_REG) || (idx == 1 && instr->dst.regnum != T1_REG) + || (idx == 2 && instr->dst.regnum != T2_REG) || (idx == 3 && instr->dst.regnum != T3_REG)) + { + WARN("Sampling from sampler s%u to register r%u is not possible in ps_1_x\n", idx, instr->dst.regnum); + writer->state = E_INVALIDARG; return; } - if(instr->src[0].type == BWRITERSPR_INPUT) { + if (instr->src[0].type == BWRITERSPR_INPUT) + { /* A simple non-dependent read tex instruction */ - if(instr->src[0].regnum != This->t_regnum[idx]) { - WARN("Cannot sample from s%lu with texture address data from interpolator %lu.\n", - idx, instr->src[0].regnum); - This->state = E_INVALIDARG; + if (instr->src[0].regnum != writer->t_regnum[idx]) + { + WARN("Cannot sample from s%u with texture address data from interpolator %u\n", idx, instr->src[0].regnum); + writer->state = E_INVALIDARG; return; } - This->funcs->opcode(This, instr, D3DSIO_TEX & D3DSI_OPCODE_MASK, buffer); + writer->funcs->opcode(writer, instr, D3DSIO_TEX & D3DSI_OPCODE_MASK, buffer);
/* map the temp dstreg to the ps_1_3 texture temporary register */ - This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod); - } else if(instr->src[0].type == BWRITERSPR_TEMP) { - + writer->funcs->dstreg(writer, &instr->dst, buffer, instr->shift, instr->dstmod); + } + else if (instr->src[0].type == BWRITERSPR_TEMP) + { swizzlemask = 3 | (3 << 2) | (3 << 4); - if((instr->src[0].u.swizzle & swizzlemask) == (BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z)) { + if ((instr->src[0].swizzle & swizzlemask) == (BWRITERVS_X_X | BWRITERVS_Y_Y | BWRITERVS_Z_Z)) + { TRACE("writing texreg2rgb\n"); - This->funcs->opcode(This, instr, D3DSIO_TEXREG2RGB & D3DSI_OPCODE_MASK, buffer); - } else if(instr->src[0].u.swizzle == (BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X)) { + writer->funcs->opcode(writer, instr, D3DSIO_TEXREG2RGB & D3DSI_OPCODE_MASK, buffer); + } + else if (instr->src[0].swizzle == (BWRITERVS_X_W | BWRITERVS_Y_X | BWRITERVS_Z_X | BWRITERVS_W_X)) + { TRACE("writing texreg2ar\n"); - This->funcs->opcode(This, instr, D3DSIO_TEXREG2AR & D3DSI_OPCODE_MASK, buffer); - } else if(instr->src[0].u.swizzle == (BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z)) { + writer->funcs->opcode(writer, instr, D3DSIO_TEXREG2AR & D3DSI_OPCODE_MASK, buffer); + } + else if (instr->src[0].swizzle == (BWRITERVS_X_Y | BWRITERVS_Y_Z | BWRITERVS_Z_Z | BWRITERVS_W_Z)) + { TRACE("writing texreg2gb\n"); - This->funcs->opcode(This, instr, D3DSIO_TEXREG2GB & D3DSI_OPCODE_MASK, buffer); - } else { - WARN("Unsupported src addr swizzle in dependent texld: 0x%08lx.\n", instr->src[0].u.swizzle); - This->state = E_INVALIDARG; + writer->funcs->opcode(writer, instr, D3DSIO_TEXREG2GB & D3DSI_OPCODE_MASK, buffer); + } + else + { + WARN("Unsupported src addr swizzle in dependent texld: 0x%08x\n", instr->src[0].swizzle); + writer->state = E_INVALIDARG; return; }
- /* Dst and src reg can be mapped normally. Both registers are temporary registers in the - * source shader and have to be mapped to the temporary form of the texture registers. However, - * the src reg doesn't have a swizzle - */ - This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod); + /* Dst and src reg can be mapped normally. Both registers are + * temporary registers in the source shader and have to be mapped to + * the temporary form of the texture registers. However, the src reg + * doesn't have a swizzle. */ + writer->funcs->dstreg(writer, &instr->dst, buffer, instr->shift, instr->dstmod); reg = instr->src[0]; - reg.u.swizzle = BWRITERVS_NOSWIZZLE; - This->funcs->srcreg(This, ®, buffer); - } else { + reg.swizzle = BWRITERVS_NOSWIZZLE; + writer->funcs->srcreg(writer, ®, buffer); + } + else + { WARN("Invalid address data source register\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } }
-static void instr_ps_1_0123_mov(struct bc_writer *This, - const struct instruction *instr, - struct bytecode_buffer *buffer) { - DWORD token = D3DSIO_MOV & D3DSI_OPCODE_MASK; - - if(instr->dst.type == BWRITERSPR_TEMP && instr->src[0].type == BWRITERSPR_INPUT) { - if((instr->dst.regnum == T0_REG && instr->src[0].regnum == This->t_regnum[0]) || - (instr->dst.regnum == T1_REG && instr->src[0].regnum == This->t_regnum[1]) || - (instr->dst.regnum == T2_REG && instr->src[0].regnum == This->t_regnum[2]) || - (instr->dst.regnum == T3_REG && instr->src[0].regnum == This->t_regnum[3])) { - if(instr->dstmod & BWRITERSPDM_SATURATE) { - This->funcs->opcode(This, instr, D3DSIO_TEXCOORD & D3DSI_OPCODE_MASK, buffer); +static void instr_ps_1_0123_mov(struct bc_writer *writer, const struct instruction *instr, + struct bytecode_buffer *buffer) +{ + uint32_t token = D3DSIO_MOV & D3DSI_OPCODE_MASK; + + if (instr->dst.type == BWRITERSPR_TEMP && instr->src[0].type == BWRITERSPR_INPUT) + { + if ((instr->dst.regnum == T0_REG && instr->src[0].regnum == writer->t_regnum[0]) + || (instr->dst.regnum == T1_REG && instr->src[0].regnum == writer->t_regnum[1]) + || (instr->dst.regnum == T2_REG && instr->src[0].regnum == writer->t_regnum[2]) + || (instr->dst.regnum == T3_REG && instr->src[0].regnum == writer->t_regnum[3])) + { + if (instr->dstmod & BWRITERSPDM_SATURATE) + { + writer->funcs->opcode(writer, instr, D3DSIO_TEXCOORD & D3DSI_OPCODE_MASK, buffer); /* Remove the SATURATE flag, it's implicit to the instruction */ - This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod & (~BWRITERSPDM_SATURATE)); + writer->funcs->dstreg(writer, &instr->dst, buffer, instr->shift, instr->dstmod & (~BWRITERSPDM_SATURATE)); return; - } else { + } + else + { WARN("A varying -> temp copy is only supported with the SATURATE modifier in <=ps_1_3\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } - } else if(instr->src[0].regnum == This->v_regnum[0] || - instr->src[0].regnum == This->v_regnum[1]) { + } + else if (instr->src[0].regnum == writer->v_regnum[0] || instr->src[0].regnum == writer->v_regnum[1]) + { /* Handled by the normal mov below. Just drop out of the if condition */ - } else { + } + else + { WARN("Unsupported varying -> temp mov in <= ps_1_3\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } }
- This->funcs->opcode(This, instr, token, buffer); - This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod); - This->funcs->srcreg(This, &instr->src[0], buffer); + writer->funcs->opcode(writer, instr, token, buffer); + writer->funcs->dstreg(writer, &instr->dst, buffer, instr->shift, instr->dstmod); + writer->funcs->srcreg(writer, &instr->src[0], buffer); }
static const struct instr_handler_table ps_1_0123_handlers[] = { @@ -1432,18 +1519,21 @@ static const struct bytecode_backend ps_1_0123_backend = { ps_1_0123_handlers };
-static void ps_1_4_srcreg(struct bc_writer *This, const struct shader_reg *reg, - struct bytecode_buffer *buffer) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - if(reg->rel_reg) { - WARN("Relative addressing not supported in <= ps_3_0\n"); - This->state = E_INVALIDARG; +static void ps_1_4_srcreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer) +{ + uint32_t token = 1u << 31; /* Bit 31 of registers is 1. */ + + if (reg->rel_reg) + { + WARN("Relative addressing not supported in <= ps_3_0.\n"); + writer->state = E_INVALIDARG; return; }
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_INPUT: - token |= map_ps_input(This, reg); + token |= map_ps_input(writer, reg); break;
/* Can be mapped 1:1 */ @@ -1454,110 +1544,117 @@ static void ps_1_4_srcreg(struct bc_writer *This, const struct shader_reg *reg,
default: WARN("Invalid register type for ps_1_4 shader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */
- if(reg->srcmod == BWRITERSPSM_ABS || reg->srcmod == BWRITERSPSM_ABSNEG || - reg->srcmod == BWRITERSPSM_NOT) { - WARN("Invalid source modifier %lu for ps_1_4.\n", reg->srcmod); - This->state = E_INVALIDARG; + if (reg->srcmod == BWRITERSPSM_ABS || reg->srcmod == BWRITERSPSM_ABSNEG || reg->srcmod == BWRITERSPSM_NOT) + { + WARN("Invalid source modifier %u for ps_1_4\n", reg->srcmod); + writer->state = E_INVALIDARG; return; } token |= d3d9_srcmod(reg->srcmod); - put_dword(buffer, token); + put_u32(buffer, token); }
-static void ps_1_4_dstreg(struct bc_writer *This, const struct shader_reg *reg, - struct bytecode_buffer *buffer, - DWORD shift, DWORD mod) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ +static void ps_1_4_dstreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer, + uint32_t shift, uint32_t mod) +{ + uint32_t token = 1u << 31; /* Bit 31 of registers is 1. */
- if(reg->rel_reg) { + if (reg->rel_reg) + { WARN("Relative addressing not supported for destination registers\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_TEMP: /* 1:1 mapping */ token |= d3dsp_register( reg->type, reg->regnum ); break;
/* For texkill */ case BWRITERSPR_INPUT: - token |= map_ps_input(This, reg); + token |= map_ps_input(writer, reg); break;
default: WARN("Invalid dest register type for 1.x pshader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
token |= (shift << D3DSP_DSTSHIFT_SHIFT) & D3DSP_DSTSHIFT_MASK; token |= d3d9_dstmod(mod);
- token |= d3d9_writemask(reg->u.writemask); - put_dword(buffer, token); + token |= d3d9_writemask(reg->writemask); + put_u32(buffer, token); }
-static void instr_ps_1_4_mov(struct bc_writer *This, - const struct instruction *instr, - struct bytecode_buffer *buffer) { - DWORD token = D3DSIO_MOV & D3DSI_OPCODE_MASK; - - if(instr->dst.type == BWRITERSPR_TEMP && instr->src[0].type == BWRITERSPR_INPUT) { - if(instr->src[0].regnum == This->t_regnum[0] || - instr->src[0].regnum == This->t_regnum[1] || - instr->src[0].regnum == This->t_regnum[2] || - instr->src[0].regnum == This->t_regnum[3] || - instr->src[0].regnum == This->t_regnum[4] || - instr->src[0].regnum == This->t_regnum[5]) { +static void instr_ps_1_4_mov(struct bc_writer *writer, const struct instruction *instr, + struct bytecode_buffer *buffer) +{ + uint32_t token = D3DSIO_MOV & D3DSI_OPCODE_MASK; + + if (instr->dst.type == BWRITERSPR_TEMP && instr->src[0].type == BWRITERSPR_INPUT) + { + if (instr->src[0].regnum == writer->t_regnum[0] || instr->src[0].regnum == writer->t_regnum[1] + || instr->src[0].regnum == writer->t_regnum[2] || instr->src[0].regnum == writer->t_regnum[3] + || instr->src[0].regnum == writer->t_regnum[4] || instr->src[0].regnum == writer->t_regnum[5]) + { /* Similar to a regular mov, but a different opcode */ token = D3DSIO_TEXCOORD & D3DSI_OPCODE_MASK; - } else if(instr->src[0].regnum == This->v_regnum[0] || - instr->src[0].regnum == This->v_regnum[1]) { + } + else if (instr->src[0].regnum == writer->v_regnum[0] || instr->src[0].regnum == writer->v_regnum[1]) + { /* Handled by the normal mov below. Just drop out of the if condition */ - } else { + } + else + { WARN("Unsupported varying -> temp mov in ps_1_4\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } }
- This->funcs->opcode(This, instr, token, buffer); - This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod); - This->funcs->srcreg(This, &instr->src[0], buffer); + writer->funcs->opcode(writer, instr, token, buffer); + writer->funcs->dstreg(writer, &instr->dst, buffer, instr->shift, instr->dstmod); + writer->funcs->srcreg(writer, &instr->src[0], buffer); }
-static void instr_ps_1_4_texld(struct bc_writer *This, - const struct instruction *instr, - struct bytecode_buffer *buffer) { - if(instr->src[1].type != BWRITERSPR_SAMPLER || - instr->src[1].regnum > 5) { - WARN("Unsupported sampler type %lu regnum %lu.\n", +static void instr_ps_1_4_texld(struct bc_writer *writer, const struct instruction *instr, + struct bytecode_buffer *buffer) +{ + if (instr->src[1].type != BWRITERSPR_SAMPLER || instr->src[1].regnum > 5) + { + WARN("Unsupported sampler type %u regnum %u.\n", instr->src[1].type, instr->src[1].regnum); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; - } else if(instr->dst.type != BWRITERSPR_TEMP) { + } + else if (instr->dst.type != BWRITERSPR_TEMP) + { WARN("Can only sample into a temp register\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- if(instr->src[1].regnum != instr->dst.regnum) { - WARN("Sampling from sampler s%lu to register r%lu is not possible in ps_1_4.\n", + if (instr->src[1].regnum != instr->dst.regnum) + { + WARN("Sampling from sampler s%u to register r%u is not possible in ps_1_4.\n", instr->src[1].regnum, instr->dst.regnum); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- This->funcs->opcode(This, instr, D3DSIO_TEX & D3DSI_OPCODE_MASK, buffer); - This->funcs->dstreg(This, &instr->dst, buffer, instr->shift, instr->dstmod); - This->funcs->srcreg(This, &instr->src[0], buffer); + writer->funcs->opcode(writer, instr, D3DSIO_TEX & D3DSI_OPCODE_MASK, buffer); + writer->funcs->dstreg(writer, &instr->dst, buffer, instr->shift, instr->dstmod); + writer->funcs->srcreg(writer, &instr->src[0], buffer); }
static const struct instr_handler_table ps_1_4_handlers[] = { @@ -1617,20 +1714,20 @@ static void vs_2_header(struct bc_writer *This, write_constI(shader, buffer, TRUE); }
-static void vs_2_srcreg(struct bc_writer *This, - const struct shader_reg *reg, - struct bytecode_buffer *buffer) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - DWORD has_swizzle; - DWORD component; - DWORD d3d9reg; +static void vs_2_srcreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer) +{ + uint32_t token = 1u << 31; /* Bit 31 of registers is 1 */ + uint32_t component; + uint32_t d3d9reg; + BOOL has_swizzle;
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_OUTPUT: - /* Map the swizzle to a writemask, the format expected - by map_vs_output - */ - switch(reg->u.swizzle) { + /* Map the swizzle to a writemask, the format expected by + * map_vs_output. */ + switch (reg->swizzle) + { case BWRITERVS_SWIZZLE_X: component = BWRITERSP_WRITEMASK_0; break; @@ -1646,7 +1743,7 @@ static void vs_2_srcreg(struct bc_writer *This, default: component = 0; } - token |= map_vs_output(This, reg->regnum, component, &has_swizzle); + token |= map_vs_output(writer, reg->regnum, component, &has_swizzle); break;
case BWRITERSPR_RASTOUT: @@ -1654,7 +1751,7 @@ static void vs_2_srcreg(struct bc_writer *This, /* These registers are mapped to input and output regs. They can be encoded in the bytecode, * but are unexpected. If we hit this path it might be due to an error. */ - FIXME("Unexpected register type %lu.\n", reg->type); + FIXME("Unexpected register type %u.\n", reg->type); /* drop through */ case BWRITERSPR_INPUT: case BWRITERSPR_TEMP: @@ -1664,66 +1761,67 @@ static void vs_2_srcreg(struct bc_writer *This, case BWRITERSPR_CONSTBOOL: case BWRITERSPR_LABEL: d3d9reg = d3d9_register(reg->type); - token |= d3dsp_register( d3d9reg, reg->regnum ); + token |= d3dsp_register(d3d9reg, reg->regnum); break;
case BWRITERSPR_LOOP: - if(reg->regnum != 0) { + if (reg->regnum != 0) + { WARN("Only regnum 0 is supported for the loop index register in vs_2_0\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } - token |= d3dsp_register( D3DSPR_LOOP, 0 ); + token |= d3dsp_register(D3DSPR_LOOP, 0); break;
case BWRITERSPR_PREDICATE: - if (This->shader->major_version != 2 || This->shader->minor_version != 1) + if (writer->shader->major_version != 2 || writer->shader->minor_version != 1) { WARN("Predicate register is allowed only in vs_2_x\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } - if(reg->regnum > 0) { + if (reg->regnum > 0) + { WARN("Only predicate register 0 is supported\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } - token |= d3dsp_register( D3DSPR_PREDICATE, 0 ); + token |= d3dsp_register(D3DSPR_PREDICATE, 0); break;
default: WARN("Invalid register type for 2.0 vshader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ - + token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ token |= d3d9_srcmod(reg->srcmod);
- if(reg->rel_reg) + if (reg->rel_reg) token |= D3DVS_ADDRMODE_RELATIVE & D3DVS_ADDRESSMODE_MASK;
- put_dword(buffer, token); + put_u32(buffer, token);
- /* vs_2_0 and newer write the register containing the index explicitly in the - * binary code - */ - if(token & D3DVS_ADDRMODE_RELATIVE) - vs_2_srcreg(This, reg->rel_reg, buffer); + /* vs_2_0 and newer write the register containing the index explicitly in + * the binary code. */ + if (token & D3DVS_ADDRMODE_RELATIVE) + vs_2_srcreg(writer, reg->rel_reg, buffer); }
-static void sm_2_opcode(struct bc_writer *This, - const struct instruction *instr, - DWORD token, struct bytecode_buffer *buffer) { - /* From sm 2 onwards instruction length is encoded in the opcode field */ - int dsts = instr->has_dst ? 1 : 0; - token |= instrlen(instr, instr->num_srcs, dsts) << D3DSI_INSTLENGTH_SHIFT; - if(instr->comptype) +static void sm_2_opcode(struct bc_writer *writer, const struct instruction *instr, uint32_t token, + struct bytecode_buffer *buffer) +{ + unsigned int dst_count = instr->has_dst ? 1 : 0; + + /* From SM 2 onwards instruction length is encoded in the opcode field. */ + token |= instrlen(instr, instr->num_srcs, dst_count) << D3DSI_INSTLENGTH_SHIFT; + if (instr->comptype) token |= (d3d9_comparetype(instr->comptype) << 16) & (0xf << 16); - if(instr->has_predicate) + if (instr->has_predicate) token |= D3DSHADER_INSTRUCTION_PREDICATED; - put_dword(buffer,token); + put_u32(buffer,token); }
static const struct instr_handler_table vs_2_0_handlers[] = { @@ -1852,22 +1950,24 @@ static const struct bytecode_backend vs_2_x_backend = { vs_2_x_handlers };
-static void write_samplers(const struct bwriter_shader *shader, struct bytecode_buffer *buffer) { - DWORD i; - DWORD instr_dcl = D3DSIO_DCL | (2 << D3DSI_INSTLENGTH_SHIFT); - DWORD token; - const DWORD reg = (1u << 31) | d3dsp_register( D3DSPR_SAMPLER, 0 ) | D3DSP_WRITEMASK_ALL; +static void write_samplers(const struct bwriter_shader *shader, struct bytecode_buffer *buffer) +{ + const uint32_t reg = (1u << 31) | d3dsp_register(D3DSPR_SAMPLER, 0) | D3DSP_WRITEMASK_ALL; + uint32_t instr_dcl = D3DSIO_DCL | (2 << D3DSI_INSTLENGTH_SHIFT); + unsigned int i; + uint32_t token;
- for(i = 0; i < shader->num_samplers; i++) { + for (i = 0; i < shader->num_samplers; ++i) + { /* Write the DCL instruction */ - put_dword(buffer, instr_dcl); - token = (1u << 31); + put_u32(buffer, instr_dcl); + token = 1u << 31; /* Already shifted */ - token |= (d3d9_sampler(shader->samplers[i].type)) & D3DSP_TEXTURETYPE_MASK; - put_dword(buffer, token); + token |= d3d9_sampler(shader->samplers[i].type) & D3DSP_TEXTURETYPE_MASK; + put_u32(buffer, token); token = reg | (shader->samplers[i].regnum & D3DSP_REGNUM_MASK); token |= d3d9_dstmod(shader->samplers[i].mod); - put_dword(buffer, token); + put_u32(buffer, token); } }
@@ -1885,20 +1985,22 @@ static void ps_2_header(struct bc_writer *This, const struct bwriter_shader *sha write_constI(shader, buffer, TRUE); }
-static void ps_2_srcreg(struct bc_writer *This, - const struct shader_reg *reg, - struct bytecode_buffer *buffer) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - DWORD d3d9reg; - if(reg->rel_reg) { +static void ps_2_srcreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer) +{ + uint32_t token = 1u << 31; /* Bit 31 of registers is 1 */ + uint32_t d3d9reg; + + if (reg->rel_reg) + { WARN("Relative addressing not supported in <= ps_3_0\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_INPUT: - token |= map_ps_input(This, reg); + token |= map_ps_input(writer, reg); break;
/* Can be mapped 1:1 */ @@ -1911,82 +2013,82 @@ static void ps_2_srcreg(struct bc_writer *This, case BWRITERSPR_LABEL: case BWRITERSPR_DEPTHOUT: d3d9reg = d3d9_register(reg->type); - token |= d3dsp_register( d3d9reg, reg->regnum ); + token |= d3dsp_register(d3d9reg, reg->regnum); break;
case BWRITERSPR_PREDICATE: - if (This->shader->minor_version == 0) + if (writer->shader->minor_version == 0) { WARN("Predicate register not supported in ps_2_0\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; } if (reg->regnum) { - WARN("Predicate register with regnum %lu not supported.\n", - reg->regnum); - This->state = E_INVALIDARG; + WARN("Predicate register with regnum %u not supported.\n", reg->regnum); + writer->state = E_INVALIDARG; } - token |= d3dsp_register( D3DSPR_PREDICATE, 0 ); + token |= d3dsp_register(D3DSPR_PREDICATE, 0); break;
default: WARN("Invalid register type for ps_2_0 shader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */ + token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; /* already shifted */
token |= d3d9_srcmod(reg->srcmod); - put_dword(buffer, token); + put_u32(buffer, token); }
-static void ps_2_0_dstreg(struct bc_writer *This, - const struct shader_reg *reg, - struct bytecode_buffer *buffer, - DWORD shift, DWORD mod) { - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - DWORD d3d9reg; +static void ps_2_0_dstreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer, + uint32_t shift, uint32_t mod) +{ + uint32_t token = 1u << 31; /* Bit 31 of registers is 1 */ + uint32_t d3d9reg;
- if(reg->rel_reg) { + if (reg->rel_reg) + { WARN("Relative addressing not supported for destination registers\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
- switch(reg->type) { + switch (reg->type) + { case BWRITERSPR_TEMP: /* 1:1 mapping */ case BWRITERSPR_COLOROUT: case BWRITERSPR_DEPTHOUT: d3d9reg = d3d9_register(reg->type); - token |= d3dsp_register( d3d9reg, reg->regnum ); + token |= d3dsp_register(d3d9reg, reg->regnum); break;
case BWRITERSPR_PREDICATE: - if (This->shader->minor_version == 0) + if (writer->shader->minor_version == 0) { WARN("Predicate register not supported in ps_2_0\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; } - token |= d3dsp_register( D3DSPR_PREDICATE, reg->regnum ); + token |= d3dsp_register(D3DSPR_PREDICATE, reg->regnum); break;
/* texkill uses the input register as a destination parameter */ case BWRITERSPR_INPUT: - token |= map_ps_input(This, reg); + token |= map_ps_input(writer, reg); break;
default: WARN("Invalid dest register type for 2.x pshader\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; }
token |= (shift << D3DSP_DSTSHIFT_SHIFT) & D3DSP_DSTSHIFT_MASK; token |= d3d9_dstmod(mod);
- token |= d3d9_writemask(reg->u.writemask); - put_dword(buffer, token); + token |= d3d9_writemask(reg->writemask); + put_u32(buffer, token); }
static const struct instr_handler_table ps_2_0_handlers[] = { @@ -2116,23 +2218,23 @@ static void sm_3_header(struct bc_writer *This, const struct bwriter_shader *sha write_samplers(shader, buffer); }
-static void sm_3_srcreg(struct bc_writer *This, - const struct shader_reg *reg, - struct bytecode_buffer *buffer) { - const struct bwriter_shader *shader = This->shader; - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - DWORD d3d9reg; +static void sm_3_srcreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer) +{ + const struct bwriter_shader *shader = writer->shader; + uint32_t token = 1u << 31; /* Bit 31 of registers is 1 */ + uint32_t d3d9reg;
d3d9reg = d3d9_register(reg->type); - token |= d3dsp_register( d3d9reg, reg->regnum ); - token |= d3d9_swizzle(reg->u.swizzle) & D3DVS_SWIZZLE_MASK; + token |= d3dsp_register(d3d9reg, reg->regnum); + token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK; token |= d3d9_srcmod(reg->srcmod);
- if(reg->rel_reg) { + if (reg->rel_reg) + { if (reg->type == BWRITERSPR_CONST && shader->type == ST_PIXEL) { - WARN("c%lu[...] is unsupported in ps_3_0.\n", reg->regnum); - This->state = E_INVALIDARG; + WARN("c%u[...] is unsupported in ps_3_0.\n", reg->regnum); + writer->state = E_INVALIDARG; return; }
@@ -2140,54 +2242,54 @@ static void sm_3_srcreg(struct bc_writer *This, || reg->rel_reg->type == BWRITERSPR_LOOP) && reg->rel_reg->regnum == 0) { token |= D3DVS_ADDRMODE_RELATIVE & D3DVS_ADDRESSMODE_MASK; - } else { + } + else + { WARN("Unsupported relative addressing register\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } }
- put_dword(buffer, token); + put_u32(buffer, token);
- /* vs_2_0 and newer write the register containing the index explicitly in the - * binary code - */ - if(token & D3DVS_ADDRMODE_RELATIVE) { - sm_3_srcreg(This, reg->rel_reg, buffer); - } + /* vs_2_0 and newer write the register containing the index explicitly in + * the binary code. */ + if (token & D3DVS_ADDRMODE_RELATIVE) + sm_3_srcreg(writer, reg->rel_reg, buffer); }
-static void sm_3_dstreg(struct bc_writer *This, - const struct shader_reg *reg, - struct bytecode_buffer *buffer, - DWORD shift, DWORD mod) { - const struct bwriter_shader *shader = This->shader; - DWORD token = (1u << 31); /* Bit 31 of registers is 1 */ - DWORD d3d9reg; +static void sm_3_dstreg(struct bc_writer *writer, const struct shader_reg *reg, struct bytecode_buffer *buffer, + uint32_t shift, uint32_t mod) +{ + const struct bwriter_shader *shader = writer->shader; + uint32_t token = 1u << 31; /* Bit 31 of registers is 1 */ + uint32_t d3d9reg;
- if(reg->rel_reg) { + if (reg->rel_reg) + { if (shader->type == ST_VERTEX && reg->type == BWRITERSPR_OUTPUT) { token |= D3DVS_ADDRMODE_RELATIVE & D3DVS_ADDRESSMODE_MASK; - } else { + } + else + { WARN("Relative addressing not supported for this shader type or register type\n"); - This->state = E_INVALIDARG; + writer->state = E_INVALIDARG; return; } }
d3d9reg = d3d9_register(reg->type); - token |= d3dsp_register( d3d9reg, reg->regnum ); + token |= d3dsp_register(d3d9reg, reg->regnum); token |= d3d9_dstmod(mod); - token |= d3d9_writemask(reg->u.writemask); - put_dword(buffer, token); + token |= d3d9_writemask(reg->writemask); + put_u32(buffer, token);
- /* vs_2_0 and newer write the register containing the index explicitly in the - * binary code - */ - if(token & D3DVS_ADDRMODE_RELATIVE) { - sm_3_srcreg(This, reg->rel_reg, buffer); - } + /* vs_2_0 and newer write the register containing the index explicitly in + * the binary code. */ + if (token & D3DVS_ADDRMODE_RELATIVE) + sm_3_srcreg(writer, reg->rel_reg, buffer); }
static const struct instr_handler_table vs_3_handlers[] = { @@ -2352,29 +2454,30 @@ shader_backends[] = {ST_PIXEL, 3, 0, &ps_3_backend}, };
-static HRESULT call_instr_handler(struct bc_writer *writer, - const struct instruction *instr, - struct bytecode_buffer *buffer) { - DWORD i=0; +static HRESULT call_instr_handler(struct bc_writer *writer, const struct instruction *instr, + struct bytecode_buffer *buffer) +{ + unsigned int i;
- while(writer->funcs->instructions[i].opcode != BWRITERSIO_END) { - if(instr->opcode == writer->funcs->instructions[i].opcode) { - if(!writer->funcs->instructions[i].func) { - WARN("Opcode %lu not supported by this profile.\n", instr->opcode); + for (i = 0; writer->funcs->instructions[i].opcode != BWRITERSIO_END; ++i) + { + if (instr->opcode == writer->funcs->instructions[i].opcode) + { + if (!writer->funcs->instructions[i].func) + { + WARN("Opcode %u not supported by this profile.\n", instr->opcode); return E_INVALIDARG; } writer->funcs->instructions[i].func(writer, instr, buffer); return S_OK; } - i++; }
- FIXME("Unhandled instruction %lu - %s.\n", instr->opcode, - debug_print_opcode(instr->opcode)); + FIXME("Unhandled instruction %u - %s.\n", instr->opcode, debug_print_opcode(instr->opcode)); return E_INVALIDARG; }
-HRESULT shader_write_bytecode(const struct bwriter_shader *shader, DWORD **result, DWORD *size) +HRESULT shader_write_bytecode(const struct bwriter_shader *shader, uint32_t **result, uint32_t *size) { struct bc_writer *writer; struct bytecode_buffer *buffer = NULL; @@ -2419,7 +2522,7 @@ HRESULT shader_write_bytecode(const struct bwriter_shader *shader, DWORD **resul }
/* Write shader type and version */ - put_dword(buffer, sm1_version(shader)); + put_u32(buffer, sm1_version(shader));
writer->funcs->header(writer, shader, buffer); if(FAILED(writer->state)) { @@ -2446,7 +2549,7 @@ HRESULT shader_write_bytecode(const struct bwriter_shader *shader, DWORD **resul goto error; }
- *size = buffer->size * sizeof(DWORD); + *size = buffer->size * sizeof(uint32_t); *result = buffer->data; buffer->data = NULL; hr = S_OK; diff --git a/dlls/d3dcompiler_43/compiler.c b/dlls/d3dcompiler_43/compiler.c index d7d2e1e681d..6ae51c75cd4 100644 --- a/dlls/d3dcompiler_43/compiler.c +++ b/dlls/d3dcompiler_43/compiler.c @@ -633,14 +633,13 @@ cleanup: return hr; }
-static HRESULT assemble_shader(const char *preproc_shader, - ID3DBlob **shader_blob, ID3DBlob **error_messages) +static HRESULT assemble_shader(const char *preproc_shader, ID3DBlob **shader_blob, ID3DBlob **error_messages) { struct bwriter_shader *shader; char *messages = NULL; - HRESULT hr; - DWORD *res, size; + uint32_t *res, size; ID3DBlob *buffer; + HRESULT hr; char *pos;
shader = SlAssembleShader(preproc_shader, &messages); diff --git a/dlls/d3dcompiler_43/d3dcompiler_private.h b/dlls/d3dcompiler_43/d3dcompiler_private.h index 713c900cee6..791c8d1cad2 100644 --- a/dlls/d3dcompiler_43/d3dcompiler_private.h +++ b/dlls/d3dcompiler_43/d3dcompiler_private.h @@ -35,6 +35,7 @@ #include "d3dcompiler.h"
#include <assert.h> +#include <stdint.h>
/* * This doesn't belong here, but for some functions it is possible to return that value, @@ -66,31 +67,36 @@ enum bwriter_comparison_type BWRITER_COMPARISON_LE };
-struct constant { - DWORD regnum; - union { +struct constant +{ + unsigned int regnum; + union + { float f; - INT i; + int i; BOOL b; - DWORD d; - } value[4]; + uint32_t d; + } value[4]; };
-struct shader_reg { - DWORD type; - DWORD regnum; - struct shader_reg *rel_reg; - DWORD srcmod; - union { - DWORD swizzle; - DWORD writemask; - } u; +struct shader_reg +{ + uint32_t type; + unsigned int regnum; + struct shader_reg *rel_reg; + uint32_t srcmod; + union + { + uint32_t swizzle; + uint32_t writemask; + }; };
-struct instruction { - DWORD opcode; - DWORD dstmod; - DWORD shift; +struct instruction +{ + uint32_t opcode; + uint32_t dstmod; + uint32_t shift; enum bwriter_comparison_type comptype; BOOL has_dst; struct shader_reg dst; @@ -101,21 +107,24 @@ struct instruction { BOOL coissue; };
-struct declaration { - DWORD usage, usage_idx; - DWORD regnum; - DWORD mod; - DWORD writemask; +struct declaration +{ + uint32_t usage, usage_idx; + uint32_t regnum; + uint32_t mod; + uint32_t writemask; BOOL builtin; };
-struct samplerdecl { - DWORD type; - DWORD regnum; - DWORD mod; +struct samplerdecl +{ + uint32_t type; + uint32_t regnum; + uint32_t mod; };
-struct bwriter_shader { +struct bwriter_shader +{ enum shader_type type; unsigned char major_version, minor_version;
@@ -163,25 +172,28 @@ struct asm_parser; /* This structure is only used in asmshader.y, but since the .l file accesses the semantic types * too it has to know it as well */ -struct rel_reg { +struct rel_reg +{ BOOL has_rel_reg; - DWORD type; - DWORD additional_offset; - DWORD rel_regnum; - DWORD swizzle; + uint32_t type; + uint32_t additional_offset; + uint32_t rel_regnum; + uint32_t swizzle; };
#define MAX_SRC_REGS 4
-struct src_regs { +struct src_regs +{ struct shader_reg reg[MAX_SRC_REGS]; unsigned int count; };
-struct asmparser_backend { - void (*constF)(struct asm_parser *This, DWORD reg, float x, float y, float z, float w); - void (*constI)(struct asm_parser *This, DWORD reg, INT x, INT y, INT z, INT w); - void (*constB)(struct asm_parser *This, DWORD reg, BOOL x); +struct asmparser_backend +{ + void (*constF)(struct asm_parser *This, uint32_t reg, float x, float y, float z, float w); + void (*constI)(struct asm_parser *This, uint32_t reg, int x, int y, int z, int w); + void (*constB)(struct asm_parser *This, uint32_t reg, BOOL x);
void (*dstreg)(struct asm_parser *This, struct instruction *instr, const struct shader_reg *dst); @@ -192,28 +204,28 @@ struct asmparser_backend { const struct shader_reg *predicate); void (*coissue)(struct asm_parser *This);
- void (*dcl_output)(struct asm_parser *This, DWORD usage, DWORD num, + void (*dcl_output)(struct asm_parser *This, uint32_t usage, uint32_t num, const struct shader_reg *reg); - void (*dcl_input)(struct asm_parser *This, DWORD usage, DWORD num, - DWORD mod, const struct shader_reg *reg); - void (*dcl_sampler)(struct asm_parser *This, DWORD samptype, DWORD mod, - DWORD regnum, unsigned int line_no); + void (*dcl_input)(struct asm_parser *This, uint32_t usage, uint32_t num, + uint32_t mod, const struct shader_reg *reg); + void (*dcl_sampler)(struct asm_parser *This, uint32_t samptype, uint32_t mod, + uint32_t regnum, unsigned int line_no);
void (*end)(struct asm_parser *This);
- void (*instr)(struct asm_parser *parser, DWORD opcode, DWORD mod, DWORD shift, + void (*instr)(struct asm_parser *parser, uint32_t opcode, uint32_t mod, uint32_t shift, enum bwriter_comparison_type comp, const struct shader_reg *dst, const struct src_regs *srcs, int expectednsrcs); };
struct instruction *alloc_instr(unsigned int srcs) DECLSPEC_HIDDEN; BOOL add_instruction(struct bwriter_shader *shader, struct instruction *instr) DECLSPEC_HIDDEN; -BOOL add_constF(struct bwriter_shader *shader, DWORD reg, float x, float y, float z, float w) DECLSPEC_HIDDEN; -BOOL add_constI(struct bwriter_shader *shader, DWORD reg, INT x, INT y, INT z, INT w) DECLSPEC_HIDDEN; -BOOL add_constB(struct bwriter_shader *shader, DWORD reg, BOOL x) DECLSPEC_HIDDEN; -BOOL record_declaration(struct bwriter_shader *shader, DWORD usage, DWORD usage_idx, - DWORD mod, BOOL output, DWORD regnum, DWORD writemask, BOOL builtin) DECLSPEC_HIDDEN; -BOOL record_sampler(struct bwriter_shader *shader, DWORD samptype, DWORD mod, DWORD regnum) DECLSPEC_HIDDEN; +BOOL add_constF(struct bwriter_shader *shader, uint32_t reg, float x, float y, float z, float w) DECLSPEC_HIDDEN; +BOOL add_constI(struct bwriter_shader *shader, uint32_t reg, int x, int y, int z, int w) DECLSPEC_HIDDEN; +BOOL add_constB(struct bwriter_shader *shader, uint32_t reg, BOOL x) DECLSPEC_HIDDEN; +BOOL record_declaration(struct bwriter_shader *shader, uint32_t usage, uint32_t usage_idx, + uint32_t mod, BOOL output, uint32_t regnum, uint32_t writemask, BOOL builtin) DECLSPEC_HIDDEN; +BOOL record_sampler(struct bwriter_shader *shader, uint32_t samptype, uint32_t mod, uint32_t regnum) DECLSPEC_HIDDEN;
#define MESSAGEBUFFER_INITIAL_SIZE 256
@@ -280,13 +292,13 @@ static inline void set_parse_status(enum parse_status *current, enum parse_statu }
/* Debug utility routines */ -const char *debug_print_srcmod(DWORD mod) DECLSPEC_HIDDEN; -const char *debug_print_dstmod(DWORD mod) DECLSPEC_HIDDEN; -const char *debug_print_shift(DWORD shift) DECLSPEC_HIDDEN; +const char *debug_print_srcmod(uint32_t mod) DECLSPEC_HIDDEN; +const char *debug_print_dstmod(uint32_t mod) DECLSPEC_HIDDEN; +const char *debug_print_shift(uint32_t shift) DECLSPEC_HIDDEN; const char *debug_print_dstreg(const struct shader_reg *reg) DECLSPEC_HIDDEN; const char *debug_print_srcreg(const struct shader_reg *reg) DECLSPEC_HIDDEN; -const char *debug_print_comp(DWORD comp) DECLSPEC_HIDDEN; -const char *debug_print_opcode(DWORD opcode) DECLSPEC_HIDDEN; +const char *debug_print_comp(uint32_t comp) DECLSPEC_HIDDEN; +const char *debug_print_opcode(uint32_t opcode) DECLSPEC_HIDDEN;
/* Used to signal an incorrect swizzle/writemask */ #define SWIZZLE_ERR ~0U @@ -516,7 +528,7 @@ enum bwriterdeclusage #define T3_REG 5
struct bwriter_shader *SlAssembleShader(const char *text, char **messages) DECLSPEC_HIDDEN; -HRESULT shader_write_bytecode(const struct bwriter_shader *shader, DWORD **result, DWORD *size) DECLSPEC_HIDDEN; +HRESULT shader_write_bytecode(const struct bwriter_shader *shader, uint32_t **result, uint32_t *size) DECLSPEC_HIDDEN; void SlDeleteShader(struct bwriter_shader *shader) DECLSPEC_HIDDEN;
#define MAKE_TAG(ch0, ch1, ch2, ch3) \ @@ -553,23 +565,24 @@ struct dxbc HRESULT dxbc_write_blob(struct dxbc *dxbc, ID3DBlob **blob) DECLSPEC_HIDDEN; void dxbc_destroy(struct dxbc *dxbc) DECLSPEC_HIDDEN; HRESULT dxbc_parse(const char *data, SIZE_T data_size, struct dxbc *dxbc) DECLSPEC_HIDDEN; -HRESULT dxbc_add_section(struct dxbc *dxbc, DWORD tag, const char *data, DWORD data_size) DECLSPEC_HIDDEN; +HRESULT dxbc_add_section(struct dxbc *dxbc, DWORD tag, const char *data, size_t data_size) DECLSPEC_HIDDEN; HRESULT dxbc_init(struct dxbc *dxbc, unsigned int size) DECLSPEC_HIDDEN;
-static inline DWORD read_dword(const char **ptr) +static inline uint32_t read_u32(const char **ptr) { - DWORD r; + uint32_t r; + memcpy(&r, *ptr, sizeof(r)); *ptr += sizeof(r); return r; }
-static inline void write_dword(char **ptr, DWORD d) +static inline void write_u32(char **ptr, uint32_t u32) { - memcpy(*ptr, &d, sizeof(d)); - *ptr += sizeof(d); + memcpy(*ptr, &u32, sizeof(u32)); + *ptr += sizeof(u32); }
-void skip_dword_unknown(const char **ptr, unsigned int count) DECLSPEC_HIDDEN; +void skip_u32_unknown(const char **ptr, unsigned int count) DECLSPEC_HIDDEN;
#endif /* __WINE_D3DCOMPILER_PRIVATE_H */ diff --git a/dlls/d3dcompiler_43/reflection.c b/dlls/d3dcompiler_43/reflection.c index cbcf8246b70..5708d3d878f 100644 --- a/dlls/d3dcompiler_43/reflection.c +++ b/dlls/d3dcompiler_43/reflection.c @@ -36,7 +36,7 @@ enum D3DCOMPILER_SIGNATURE_ELEMENT_SIZE struct d3dcompiler_shader_signature { D3D11_SIGNATURE_PARAMETER_DESC *elements; - UINT element_count; + unsigned int element_count; char *string_data; };
@@ -45,7 +45,7 @@ struct d3dcompiler_shader_reflection_type ID3D11ShaderReflectionType ID3D11ShaderReflectionType_iface; ID3D10ShaderReflectionType ID3D10ShaderReflectionType_iface;
- DWORD id; + uint32_t id; struct wine_rb_entry entry;
struct d3dcompiler_shader_reflection *reflection; @@ -58,7 +58,7 @@ struct d3dcompiler_shader_reflection_type struct d3dcompiler_shader_reflection_type_member { char *name; - DWORD offset; + uint32_t offset; struct d3dcompiler_shader_reflection_type *type; };
@@ -109,7 +109,7 @@ struct d3dcompiler_shader_reflection
enum D3DCOMPILER_REFLECTION_VERSION interface_version;
- DWORD target; + uint32_t target; char *creator; UINT flags; UINT version; @@ -154,7 +154,7 @@ struct d3dcompiler_shader_reflection struct wine_rb_tree types; };
-static struct d3dcompiler_shader_reflection_type *get_reflection_type(struct d3dcompiler_shader_reflection *reflection, const char *data, DWORD offset); +static struct d3dcompiler_shader_reflection_type *get_reflection_type(struct d3dcompiler_shader_reflection *reflection, const char *data, uint32_t offset);
static const struct ID3D11ShaderReflectionConstantBufferVtbl d3dcompiler_shader_reflection_constant_buffer_vtbl; static const struct ID3D11ShaderReflectionVariableVtbl d3dcompiler_shader_reflection_variable_vtbl; @@ -207,7 +207,7 @@ static BOOL copy_name(const char *ptr, char **name) return TRUE; }
-static BOOL copy_value(const char *ptr, void **value, DWORD size) +static BOOL copy_value(const char *ptr, void **value, uint32_t size) { if (!ptr || !size) return TRUE;
@@ -226,7 +226,7 @@ static BOOL copy_value(const char *ptr, void **value, DWORD size) static int d3dcompiler_shader_reflection_type_compare(const void *key, const struct wine_rb_entry *entry) { const struct d3dcompiler_shader_reflection_type *t = WINE_RB_ENTRY_VALUE(entry, const struct d3dcompiler_shader_reflection_type, entry); - const DWORD *id = key; + const uint32_t *id = key;
return *id - t->id; } @@ -1087,119 +1087,119 @@ static const struct ID3D11ShaderReflectionTypeVtbl d3dcompiler_shader_reflection d3dcompiler_shader_reflection_type_ImplementsInterface, };
-static HRESULT d3dcompiler_parse_stat(struct d3dcompiler_shader_reflection *r, const char *data, DWORD data_size) +static HRESULT d3dcompiler_parse_stat(struct d3dcompiler_shader_reflection *r, const char *data, size_t data_size) { const char *ptr = data; - DWORD size = data_size >> 2; + size_t size = data_size >> 2;
- TRACE("Size %lu\n", size); + TRACE("Size %Iu.\n", size);
- r->instruction_count = read_dword(&ptr); - TRACE("InstructionCount: %u\n", r->instruction_count); + r->instruction_count = read_u32(&ptr); + TRACE("InstructionCount: %u.\n", r->instruction_count);
- r->temp_register_count = read_dword(&ptr); - TRACE("TempRegisterCount: %u\n", r->temp_register_count); + r->temp_register_count = read_u32(&ptr); + TRACE("TempRegisterCount: %u.\n", r->temp_register_count);
- r->def_count = read_dword(&ptr); - TRACE("DefCount: %u\n", r->def_count); + r->def_count = read_u32(&ptr); + TRACE("DefCount: %u.\n", r->def_count);
- r->dcl_count = read_dword(&ptr); - TRACE("DclCount: %u\n", r->dcl_count); + r->dcl_count = read_u32(&ptr); + TRACE("DclCount: %u.\n", r->dcl_count);
- r->float_instruction_count = read_dword(&ptr); - TRACE("FloatInstructionCount: %u\n", r->float_instruction_count); + r->float_instruction_count = read_u32(&ptr); + TRACE("FloatInstructionCount: %u.\n", r->float_instruction_count);
- r->int_instruction_count = read_dword(&ptr); - TRACE("IntInstructionCount: %u\n", r->int_instruction_count); + r->int_instruction_count = read_u32(&ptr); + TRACE("IntInstructionCount: %u.\n", r->int_instruction_count);
- r->uint_instruction_count = read_dword(&ptr); - TRACE("UintInstructionCount: %u\n", r->uint_instruction_count); + r->uint_instruction_count = read_u32(&ptr); + TRACE("UintInstructionCount: %u.\n", r->uint_instruction_count);
- r->static_flow_control_count = read_dword(&ptr); - TRACE("StaticFlowControlCount: %u\n", r->static_flow_control_count); + r->static_flow_control_count = read_u32(&ptr); + TRACE("StaticFlowControlCount: %u.\n", r->static_flow_control_count);
- r->dynamic_flow_control_count = read_dword(&ptr); - TRACE("DynamicFlowControlCount: %u\n", r->dynamic_flow_control_count); + r->dynamic_flow_control_count = read_u32(&ptr); + TRACE("DynamicFlowControlCount: %u.\n", r->dynamic_flow_control_count);
- r->macro_instruction_count = read_dword(&ptr); - TRACE("MacroInstructionCount: %u\n", r->macro_instruction_count); + r->macro_instruction_count = read_u32(&ptr); + TRACE("MacroInstructionCount: %u.\n", r->macro_instruction_count);
- r->temp_array_count = read_dword(&ptr); - TRACE("TempArrayCount: %u\n", r->temp_array_count); + r->temp_array_count = read_u32(&ptr); + TRACE("TempArrayCount: %u.\n", r->temp_array_count);
- r->array_instruction_count = read_dword(&ptr); - TRACE("ArrayInstructionCount: %u\n", r->array_instruction_count); + r->array_instruction_count = read_u32(&ptr); + TRACE("ArrayInstructionCount: %u.\n", r->array_instruction_count);
- r->cut_instruction_count = read_dword(&ptr); - TRACE("CutInstructionCount: %u\n", r->cut_instruction_count); + r->cut_instruction_count = read_u32(&ptr); + TRACE("CutInstructionCount: %u.\n", r->cut_instruction_count);
- r->emit_instruction_count = read_dword(&ptr); - TRACE("EmitInstructionCount: %u\n", r->emit_instruction_count); + r->emit_instruction_count = read_u32(&ptr); + TRACE("EmitInstructionCount: %u.\n", r->emit_instruction_count);
- r->texture_normal_instructions = read_dword(&ptr); - TRACE("TextureNormalInstructions: %u\n", r->texture_normal_instructions); + r->texture_normal_instructions = read_u32(&ptr); + TRACE("TextureNormalInstructions: %u.\n", r->texture_normal_instructions);
- r->texture_load_instructions = read_dword(&ptr); - TRACE("TextureLoadInstructions: %u\n", r->texture_load_instructions); + r->texture_load_instructions = read_u32(&ptr); + TRACE("TextureLoadInstructions: %u.\n", r->texture_load_instructions);
- r->texture_comp_instructions = read_dword(&ptr); - TRACE("TextureCompInstructions: %u\n", r->texture_comp_instructions); + r->texture_comp_instructions = read_u32(&ptr); + TRACE("TextureCompInstructions: %u.\n", r->texture_comp_instructions);
- r->texture_bias_instructions = read_dword(&ptr); - TRACE("TextureBiasInstructions: %u\n", r->texture_bias_instructions); + r->texture_bias_instructions = read_u32(&ptr); + TRACE("TextureBiasInstructions: %u.\n", r->texture_bias_instructions);
- r->texture_gradient_instructions = read_dword(&ptr); - TRACE("TextureGradientInstructions: %u\n", r->texture_gradient_instructions); + r->texture_gradient_instructions = read_u32(&ptr); + TRACE("TextureGradientInstructions: %u.\n", r->texture_gradient_instructions);
- r->mov_instruction_count = read_dword(&ptr); - TRACE("MovInstructionCount: %u\n", r->mov_instruction_count); + r->mov_instruction_count = read_u32(&ptr); + TRACE("MovInstructionCount: %u.\n", r->mov_instruction_count);
- skip_dword_unknown(&ptr, 1); + skip_u32_unknown(&ptr, 1);
- r->conversion_instruction_count = read_dword(&ptr); - TRACE("ConversionInstructionCount: %u\n", r->conversion_instruction_count); + r->conversion_instruction_count = read_u32(&ptr); + TRACE("ConversionInstructionCount: %u.\n", r->conversion_instruction_count);
- skip_dword_unknown(&ptr, 1); + skip_u32_unknown(&ptr, 1);
- r->input_primitive = read_dword(&ptr); - TRACE("InputPrimitive: %x\n", r->input_primitive); + r->input_primitive = read_u32(&ptr); + TRACE("InputPrimitive: %x.\n", r->input_primitive);
- r->gs_output_topology = read_dword(&ptr); - TRACE("GSOutputTopology: %x\n", r->gs_output_topology); + r->gs_output_topology = read_u32(&ptr); + TRACE("GSOutputTopology: %x.\n", r->gs_output_topology);
- r->gs_max_output_vertex_count = read_dword(&ptr); - TRACE("GSMaxOutputVertexCount: %u\n", r->gs_max_output_vertex_count); + r->gs_max_output_vertex_count = read_u32(&ptr); + TRACE("GSMaxOutputVertexCount: %u.\n", r->gs_max_output_vertex_count);
- skip_dword_unknown(&ptr, 2); + skip_u32_unknown(&ptr, 2);
/* old dx10 stat size */ if (size == 28) return S_OK;
- skip_dword_unknown(&ptr, 1); + skip_u32_unknown(&ptr, 1);
/* dx10 stat size */ if (size == 29) return S_OK;
- skip_dword_unknown(&ptr, 1); + skip_u32_unknown(&ptr, 1);
- r->c_control_points = read_dword(&ptr); - TRACE("cControlPoints: %u\n", r->c_control_points); + r->c_control_points = read_u32(&ptr); + TRACE("cControlPoints: %u.\n", r->c_control_points);
- r->hs_output_primitive = read_dword(&ptr); - TRACE("HSOutputPrimitive: %x\n", r->hs_output_primitive); + r->hs_output_primitive = read_u32(&ptr); + TRACE("HSOutputPrimitive: %x.\n", r->hs_output_primitive);
- r->hs_partitioning = read_dword(&ptr); - TRACE("HSPartitioning: %x\n", r->hs_partitioning); + r->hs_partitioning = read_u32(&ptr); + TRACE("HSPartitioning: %x.\n", r->hs_partitioning);
- r->tessellator_domain = read_dword(&ptr); - TRACE("TessellatorDomain: %x\n", r->tessellator_domain); + r->tessellator_domain = read_u32(&ptr); + TRACE("TessellatorDomain: %x.\n", r->tessellator_domain);
- skip_dword_unknown(&ptr, 3); + skip_u32_unknown(&ptr, 3);
/* dx11 stat size */ if (size == 37) return S_OK;
- FIXME("Unhandled size %lu.\n", size); + FIXME("Unhandled size %Iu.\n", size);
return E_FAIL; } @@ -1207,9 +1207,9 @@ static HRESULT d3dcompiler_parse_stat(struct d3dcompiler_shader_reflection *r, c static HRESULT d3dcompiler_parse_type_members(struct d3dcompiler_shader_reflection *ref, struct d3dcompiler_shader_reflection_type_member *member, const char *data, const char **ptr) { - DWORD offset; + uint32_t offset;
- offset = read_dword(ptr); + offset = read_u32(ptr); if (!copy_name(data + offset, &member->name)) { ERR("Failed to copy name.\n"); @@ -1217,8 +1217,8 @@ static HRESULT d3dcompiler_parse_type_members(struct d3dcompiler_shader_reflecti } TRACE("Member name: %s.\n", debugstr_a(member->name));
- offset = read_dword(ptr); - TRACE("Member type offset: %#lx\n", offset); + offset = read_u32(ptr); + TRACE("Member type offset: %x.\n", offset);
member->type = get_reflection_type(ref, data, offset); if (!member->type) @@ -1228,45 +1228,45 @@ static HRESULT d3dcompiler_parse_type_members(struct d3dcompiler_shader_reflecti return E_FAIL; }
- member->offset = read_dword(ptr); - TRACE("Member offset %#lx\n", member->offset); + member->offset = read_u32(ptr); + TRACE("Member offset %x.\n", member->offset);
return S_OK; }
-static HRESULT d3dcompiler_parse_type(struct d3dcompiler_shader_reflection_type *type, const char *data, DWORD offset) +static HRESULT d3dcompiler_parse_type(struct d3dcompiler_shader_reflection_type *type, const char *data, uint32_t offset) { const char *ptr = data + offset; - DWORD temp; + uint32_t temp; D3D11_SHADER_TYPE_DESC *desc; unsigned int i; struct d3dcompiler_shader_reflection_type_member *members = NULL; HRESULT hr; - DWORD member_offset; + uint32_t member_offset;
desc = &type->desc;
- temp = read_dword(&ptr); + temp = read_u32(&ptr); desc->Class = temp & 0xffff; desc->Type = temp >> 16; TRACE("Class %s, Type %s\n", debug_d3dcompiler_shader_variable_class(desc->Class), debug_d3dcompiler_shader_variable_type(desc->Type));
- temp = read_dword(&ptr); + temp = read_u32(&ptr); desc->Rows = temp & 0xffff; desc->Columns = temp >> 16; TRACE("Rows %u, Columns %u\n", desc->Rows, desc->Columns);
- temp = read_dword(&ptr); + temp = read_u32(&ptr); desc->Elements = temp & 0xffff; desc->Members = temp >> 16; TRACE("Elements %u, Members %u\n", desc->Elements, desc->Members);
- member_offset = read_dword(&ptr); - TRACE("Member Offset %lu\n", member_offset); + member_offset = read_u32(&ptr); + TRACE("Member Offset %u.\n", member_offset);
if ((type->reflection->target & D3DCOMPILER_SHADER_TARGET_VERSION_MASK) >= 0x500) - skip_dword_unknown(&ptr, 4); + skip_u32_unknown(&ptr, 4);
if (desc->Members) { @@ -1292,7 +1292,7 @@ static HRESULT d3dcompiler_parse_type(struct d3dcompiler_shader_reflection_type
if ((type->reflection->target & D3DCOMPILER_SHADER_TARGET_VERSION_MASK) >= 0x500) { - offset = read_dword(&ptr); + offset = read_u32(&ptr); if (!copy_name(data + offset, &type->name)) { ERR("Failed to copy name.\n"); @@ -1316,7 +1316,7 @@ err_out: return hr; }
-static struct d3dcompiler_shader_reflection_type *get_reflection_type(struct d3dcompiler_shader_reflection *reflection, const char *data, DWORD offset) +static struct d3dcompiler_shader_reflection_type *get_reflection_type(struct d3dcompiler_shader_reflection *reflection, const char *data, uint32_t offset) { struct d3dcompiler_shader_reflection_type *type; struct wine_rb_entry *entry; @@ -1357,7 +1357,7 @@ static struct d3dcompiler_shader_reflection_type *get_reflection_type(struct d3d }
static HRESULT d3dcompiler_parse_variables(struct d3dcompiler_shader_reflection_constant_buffer *cb, - const char *data, DWORD data_size, const char *ptr) + const char *data, size_t data_size, const char *ptr) { struct d3dcompiler_shader_reflection_variable *variables; unsigned int i; @@ -1373,13 +1373,13 @@ static HRESULT d3dcompiler_parse_variables(struct d3dcompiler_shader_reflection_ for (i = 0; i < cb->variable_count; i++) { struct d3dcompiler_shader_reflection_variable *v = &variables[i]; - DWORD offset; + uint32_t offset;
v->ID3D11ShaderReflectionVariable_iface.lpVtbl = &d3dcompiler_shader_reflection_variable_vtbl; v->ID3D10ShaderReflectionVariable_iface.lpVtbl = &d3d10_shader_reflection_variable_vtbl; v->constant_buffer = cb;
- offset = read_dword(&ptr); + offset = read_u32(&ptr); if (!copy_name(data + offset, &v->name)) { ERR("Failed to copy name.\n"); @@ -1388,17 +1388,17 @@ static HRESULT d3dcompiler_parse_variables(struct d3dcompiler_shader_reflection_ } TRACE("Variable name: %s.\n", debugstr_a(v->name));
- v->start_offset = read_dword(&ptr); + v->start_offset = read_u32(&ptr); TRACE("Variable offset: %u\n", v->start_offset);
- v->size = read_dword(&ptr); + v->size = read_u32(&ptr); TRACE("Variable size: %u\n", v->size);
- v->flags = read_dword(&ptr); + v->flags = read_u32(&ptr); TRACE("Variable flags: %u\n", v->flags);
- offset = read_dword(&ptr); - TRACE("Variable type offset: %#lx.\n", offset); + offset = read_u32(&ptr); + TRACE("Variable type offset: %x.\n", offset); v->type = get_reflection_type(cb->reflection, data, offset); if (!v->type) { @@ -1407,8 +1407,8 @@ static HRESULT d3dcompiler_parse_variables(struct d3dcompiler_shader_reflection_ goto err_out; }
- offset = read_dword(&ptr); - TRACE("Variable default value offset: %#lx.\n", offset); + offset = read_u32(&ptr); + TRACE("Variable default value offset: %x.\n", offset); if (!copy_value(data + offset, &v->default_value, offset ? v->size : 0)) { ERR("Failed to copy name.\n"); @@ -1417,7 +1417,7 @@ static HRESULT d3dcompiler_parse_variables(struct d3dcompiler_shader_reflection_ }
if ((cb->reflection->target & D3DCOMPILER_SHADER_TARGET_VERSION_MASK) >= 0x500) - skip_dword_unknown(&ptr, 4); + skip_u32_unknown(&ptr, 4); }
cb->variables = variables; @@ -1433,50 +1433,50 @@ err_out: return hr; }
-static HRESULT d3dcompiler_parse_rdef(struct d3dcompiler_shader_reflection *r, const char *data, DWORD data_size) +static HRESULT d3dcompiler_parse_rdef(struct d3dcompiler_shader_reflection *r, const char *data, size_t data_size) { struct d3dcompiler_shader_reflection_constant_buffer *constant_buffers = NULL; - DWORD offset, cbuffer_offset, resource_offset, creator_offset; + uint32_t offset, cbuffer_offset, resource_offset, creator_offset; unsigned int i, string_data_offset, string_data_size; D3D12_SHADER_INPUT_BIND_DESC *bound_resources = NULL; char *string_data = NULL, *creator = NULL; - DWORD size = data_size >> 2; + size_t size = data_size >> 2; + uint32_t target_version; const char *ptr = data; - DWORD target_version; HRESULT hr;
- TRACE("Size %lu\n", size); + TRACE("Size %Iu.\n", size);
- r->constant_buffer_count = read_dword(&ptr); - TRACE("Constant buffer count: %u\n", r->constant_buffer_count); + r->constant_buffer_count = read_u32(&ptr); + TRACE("Constant buffer count: %u.\n", r->constant_buffer_count);
- cbuffer_offset = read_dword(&ptr); - TRACE("Constant buffer offset: %#lx\n", cbuffer_offset); + cbuffer_offset = read_u32(&ptr); + TRACE("Constant buffer offset: %#x.\n", cbuffer_offset);
- r->bound_resource_count = read_dword(&ptr); - TRACE("Bound resource count: %u\n", r->bound_resource_count); + r->bound_resource_count = read_u32(&ptr); + TRACE("Bound resource count: %u.\n", r->bound_resource_count);
- resource_offset = read_dword(&ptr); - TRACE("Bound resource offset: %#lx\n", resource_offset); + resource_offset = read_u32(&ptr); + TRACE("Bound resource offset: %#x.\n", resource_offset);
- r->target = read_dword(&ptr); - TRACE("Target: %#lx\n", r->target); + r->target = read_u32(&ptr); + TRACE("Target: %#x.\n", r->target);
target_version = r->target & D3DCOMPILER_SHADER_TARGET_VERSION_MASK;
#if D3D_COMPILER_VERSION < 47 if (target_version >= 0x501) { - WARN("Target version %#lx is not supported in d3dcompiler %u.\n", target_version, D3D_COMPILER_VERSION); + WARN("Target version %#x is not supported in d3dcompiler %u.\n", target_version, D3D_COMPILER_VERSION); return E_INVALIDARG; } #endif
- r->flags = read_dword(&ptr); - TRACE("Flags: %u\n", r->flags); + r->flags = read_u32(&ptr); + TRACE("Flags: %u.\n", r->flags);
- creator_offset = read_dword(&ptr); - TRACE("Creator at offset %#lx.\n", creator_offset); + creator_offset = read_u32(&ptr); + TRACE("Creator at offset %#x.\n", creator_offset);
if (!copy_name(data + creator_offset, &creator)) { @@ -1488,13 +1488,13 @@ static HRESULT d3dcompiler_parse_rdef(struct d3dcompiler_shader_reflection *r, c /* todo: Parse RD11 */ if (target_version >= 0x500) { - skip_dword_unknown(&ptr, 8); + skip_u32_unknown(&ptr, 8); }
if (r->bound_resource_count) { /* 8 for each bind desc */ - string_data_offset = resource_offset + r->bound_resource_count * 8 * sizeof(DWORD); + string_data_offset = resource_offset + r->bound_resource_count * 8 * sizeof(uint32_t); string_data_size = (cbuffer_offset ? cbuffer_offset : creator_offset) - string_data_offset;
string_data = HeapAlloc(GetProcessHeap(), 0, string_data_size); @@ -1519,36 +1519,36 @@ static HRESULT d3dcompiler_parse_rdef(struct d3dcompiler_shader_reflection *r, c { D3D12_SHADER_INPUT_BIND_DESC *desc = &bound_resources[i];
- offset = read_dword(&ptr); + offset = read_u32(&ptr); desc->Name = string_data + (offset - string_data_offset); - TRACE("Input bind Name: %s\n", debugstr_a(desc->Name)); + TRACE("Input bind Name: %s.\n", debugstr_a(desc->Name));
- desc->Type = read_dword(&ptr); - TRACE("Input bind Type: %#x\n", desc->Type); + desc->Type = read_u32(&ptr); + TRACE("Input bind Type: %#x.\n", desc->Type);
- desc->ReturnType = read_dword(&ptr); - TRACE("Input bind ReturnType: %#x\n", desc->ReturnType); + desc->ReturnType = read_u32(&ptr); + TRACE("Input bind ReturnType: %#x.\n", desc->ReturnType);
- desc->Dimension = read_dword(&ptr); - TRACE("Input bind Dimension: %#x\n", desc->Dimension); + desc->Dimension = read_u32(&ptr); + TRACE("Input bind Dimension: %#x.\n", desc->Dimension);
- desc->NumSamples = read_dword(&ptr); - TRACE("Input bind NumSamples: %u\n", desc->NumSamples); + desc->NumSamples = read_u32(&ptr); + TRACE("Input bind NumSamples: %u.\n", desc->NumSamples);
- desc->BindPoint = read_dword(&ptr); - TRACE("Input bind BindPoint: %u\n", desc->BindPoint); + desc->BindPoint = read_u32(&ptr); + TRACE("Input bind BindPoint: %u.\n", desc->BindPoint);
- desc->BindCount = read_dword(&ptr); - TRACE("Input bind BindCount: %u\n", desc->BindCount); + desc->BindCount = read_u32(&ptr); + TRACE("Input bind BindCount: %u.\n", desc->BindCount);
- desc->uFlags = read_dword(&ptr); - TRACE("Input bind uFlags: %u\n", desc->uFlags); + desc->uFlags = read_u32(&ptr); + TRACE("Input bind uFlags: %u.\n", desc->uFlags);
if (target_version >= 0x501) { - desc->Space = read_dword(&ptr); + desc->Space = read_u32(&ptr); TRACE("Input bind Space %u.\n", desc->Space); - desc->uID = read_dword(&ptr); + desc->uID = read_u32(&ptr); TRACE("Input bind uID %u.\n", desc->uID); } else @@ -1578,7 +1578,7 @@ static HRESULT d3dcompiler_parse_rdef(struct d3dcompiler_shader_reflection *r, c cb->ID3D10ShaderReflectionConstantBuffer_iface.lpVtbl = &d3d10_shader_reflection_constant_buffer_vtbl; cb->reflection = r;
- offset = read_dword(&ptr); + offset = read_u32(&ptr); if (!copy_name(data + offset, &cb->name)) { ERR("Failed to copy name.\n"); @@ -1587,11 +1587,11 @@ static HRESULT d3dcompiler_parse_rdef(struct d3dcompiler_shader_reflection *r, c } TRACE("Name: %s.\n", debugstr_a(cb->name));
- cb->variable_count = read_dword(&ptr); - TRACE("Variable count: %u\n", cb->variable_count); + cb->variable_count = read_u32(&ptr); + TRACE("Variable count: %u.\n", cb->variable_count);
- offset = read_dword(&ptr); - TRACE("Variable offset: %#lx\n", offset); + offset = read_u32(&ptr); + TRACE("Variable offset: %x.\n", offset);
hr = d3dcompiler_parse_variables(cb, data, data_size, data + offset); if (hr != S_OK) @@ -1600,14 +1600,14 @@ static HRESULT d3dcompiler_parse_rdef(struct d3dcompiler_shader_reflection *r, c goto err_out; }
- cb->size = read_dword(&ptr); - TRACE("Cbuffer size: %u\n", cb->size); + cb->size = read_u32(&ptr); + TRACE("Cbuffer size: %u.\n", cb->size);
- cb->flags = read_dword(&ptr); - TRACE("Cbuffer flags: %u\n", cb->flags); + cb->flags = read_u32(&ptr); + TRACE("Cbuffer flags: %u.\n", cb->flags);
- cb->type = read_dword(&ptr); - TRACE("Cbuffer type: %#x\n", cb->type); + cb->type = read_u32(&ptr); + TRACE("Cbuffer type: %#x.\n", cb->type); } }
@@ -1633,14 +1633,13 @@ err_out:
static HRESULT d3dcompiler_parse_signature(struct d3dcompiler_shader_signature *s, struct dxbc_section *section) { + enum D3DCOMPILER_SIGNATURE_ELEMENT_SIZE element_size; D3D11_SIGNATURE_PARAMETER_DESC *d; unsigned int string_data_offset; - unsigned int string_data_size; const char *ptr = section->data; + unsigned int string_data_size; + unsigned int i, count; char *string_data; - unsigned int i; - DWORD count; - enum D3DCOMPILER_SIGNATURE_ELEMENT_SIZE element_size;
switch (section->tag) { @@ -1660,10 +1659,10 @@ static HRESULT d3dcompiler_parse_signature(struct d3dcompiler_shader_signature * break; }
- count = read_dword(&ptr); - TRACE("%lu elements\n", count); + count = read_u32(&ptr); + TRACE("%u elements\n", count);
- skip_dword_unknown(&ptr, 1); + skip_u32_unknown(&ptr, 1);
d = HeapAlloc(GetProcessHeap(), 0, count * sizeof(*d)); if (!d) @@ -1672,8 +1671,8 @@ static HRESULT d3dcompiler_parse_signature(struct d3dcompiler_shader_signature * return E_OUTOFMEMORY; }
- /* 2 DWORDs for the header, element_size for each element. */ - string_data_offset = 2 * sizeof(DWORD) + count * element_size * sizeof(DWORD); + /* 2 u32s for the header, element_size for each element. */ + string_data_offset = 2 * sizeof(uint32_t) + count * element_size * sizeof(uint32_t); string_data_size = section->data_size - string_data_offset;
string_data = HeapAlloc(GetProcessHeap(), 0, string_data_size); @@ -1687,8 +1686,7 @@ static HRESULT d3dcompiler_parse_signature(struct d3dcompiler_shader_signature *
for (i = 0; i < count; ++i) { - UINT name_offset; - DWORD mask; + uint32_t name_offset, mask;
#if D3D_COMPILER_VERSION >= 46 /* FIXME */ @@ -1696,20 +1694,20 @@ static HRESULT d3dcompiler_parse_signature(struct d3dcompiler_shader_signature * #endif if (element_size == D3DCOMPILER_SIGNATURE_ELEMENT_SIZE7) { - d[i].Stream = read_dword(&ptr); + d[i].Stream = read_u32(&ptr); } else { d[i].Stream = 0; }
- name_offset = read_dword(&ptr); + name_offset = read_u32(&ptr); d[i].SemanticName = string_data + (name_offset - string_data_offset); - d[i].SemanticIndex = read_dword(&ptr); - d[i].SystemValueType = read_dword(&ptr); - d[i].ComponentType = read_dword(&ptr); - d[i].Register = read_dword(&ptr); - mask = read_dword(&ptr); + d[i].SemanticIndex = read_u32(&ptr); + d[i].SystemValueType = read_u32(&ptr); + d[i].ComponentType = read_u32(&ptr); + d[i].Register = read_u32(&ptr); + mask = read_u32(&ptr); d[i].ReadWriteMask = (mask >> 8) & 0xff; d[i].Mask = mask & 0xff;
@@ -1737,11 +1735,11 @@ static HRESULT d3dcompiler_parse_signature(struct d3dcompiler_shader_signature * return S_OK; }
-static HRESULT d3dcompiler_parse_shdr(struct d3dcompiler_shader_reflection *r, const char *data, DWORD data_size) +static HRESULT d3dcompiler_parse_shdr(struct d3dcompiler_shader_reflection *r, const char *data, size_t data_size) { const char *ptr = data;
- r->version = read_dword(&ptr); + r->version = read_u32(&ptr); TRACE("Shader version: %u\n", r->version);
/* todo: Check if anything else is needed from the shdr or shex blob. */ @@ -2353,8 +2351,8 @@ HRESULT WINAPI D3D10ReflectShader(const void *data, SIZE_T data_size, ID3D10Shad HRESULT WINAPI D3DReflect(const void *data, SIZE_T data_size, REFIID riid, void **reflector) { struct d3dcompiler_shader_reflection *object; + const uint32_t *temp = data; HRESULT hr; - const DWORD *temp = data;
TRACE("data %p, data_size %Iu, riid %s, blob %p.\n", data, data_size, debugstr_guid(riid), reflector);
diff --git a/dlls/d3dcompiler_43/utils.c b/dlls/d3dcompiler_43/utils.c index 7d5c5395d6a..a8c13a63b67 100644 --- a/dlls/d3dcompiler_43/utils.c +++ b/dlls/d3dcompiler_43/utils.c @@ -125,7 +125,7 @@ const char *debug_d3dcompiler_d3d_blob_part(D3D_BLOB_PART part) } }
-const char *debug_print_srcmod(DWORD mod) +const char *debug_print_srcmod(uint32_t mod) { switch (mod) { @@ -143,14 +143,14 @@ const char *debug_print_srcmod(DWORD mod) WINE_D3DCOMPILER_TO_STR(BWRITERSPSM_ABSNEG); WINE_D3DCOMPILER_TO_STR(BWRITERSPSM_NOT); default: - FIXME("Unrecognized source modifier %#lx.\n", mod); + FIXME("Unrecognized source modifier %#x.\n", mod); return "unrecognized_src_mod"; } }
#undef WINE_D3DCOMPILER_TO_STR
-const char *debug_print_dstmod(DWORD mod) +const char *debug_print_dstmod(uint32_t mod) { switch (mod) { @@ -175,7 +175,7 @@ const char *debug_print_dstmod(DWORD mod) } }
-const char *debug_print_shift(DWORD shift) +const char *debug_print_shift(uint32_t shift) { static const char * const shiftstrings[] = { @@ -204,15 +204,15 @@ static const char *get_regname(const struct shader_reg *reg) switch (reg->type) { case BWRITERSPR_TEMP: - return wine_dbg_sprintf("r%lu", reg->regnum); + return wine_dbg_sprintf("r%u", reg->regnum); case BWRITERSPR_INPUT: - return wine_dbg_sprintf("v%lu", reg->regnum); + return wine_dbg_sprintf("v%u", reg->regnum); case BWRITERSPR_CONST: - return wine_dbg_sprintf("c%lu", reg->regnum); + return wine_dbg_sprintf("c%u", reg->regnum); case BWRITERSPR_ADDR: - return wine_dbg_sprintf("a%lu", reg->regnum); + return wine_dbg_sprintf("a%u", reg->regnum); case BWRITERSPR_TEXTURE: - return wine_dbg_sprintf("t%lu", reg->regnum); + return wine_dbg_sprintf("t%u", reg->regnum); case BWRITERSPR_RASTOUT: switch (reg->regnum) { @@ -222,21 +222,21 @@ static const char *get_regname(const struct shader_reg *reg) default: return "Unexpected RASTOUT"; } case BWRITERSPR_ATTROUT: - return wine_dbg_sprintf("oD%lu", reg->regnum); + return wine_dbg_sprintf("oD%u", reg->regnum); case BWRITERSPR_TEXCRDOUT: - return wine_dbg_sprintf("oT%lu", reg->regnum); + return wine_dbg_sprintf("oT%u", reg->regnum); case BWRITERSPR_OUTPUT: - return wine_dbg_sprintf("o%lu", reg->regnum); + return wine_dbg_sprintf("o%u", reg->regnum); case BWRITERSPR_CONSTINT: - return wine_dbg_sprintf("i%lu", reg->regnum); + return wine_dbg_sprintf("i%u", reg->regnum); case BWRITERSPR_COLOROUT: - return wine_dbg_sprintf("oC%lu", reg->regnum); + return wine_dbg_sprintf("oC%u", reg->regnum); case BWRITERSPR_DEPTHOUT: return "oDepth"; case BWRITERSPR_SAMPLER: - return wine_dbg_sprintf("s%lu", reg->regnum); + return wine_dbg_sprintf("s%u", reg->regnum); case BWRITERSPR_CONSTBOOL: - return wine_dbg_sprintf("b%lu", reg->regnum); + return wine_dbg_sprintf("b%u", reg->regnum); case BWRITERSPR_LOOP: return "aL"; case BWRITERSPR_MISCTYPE: @@ -247,15 +247,15 @@ static const char *get_regname(const struct shader_reg *reg) default: return "unexpected misctype"; } case BWRITERSPR_LABEL: - return wine_dbg_sprintf("l%lu", reg->regnum); + return wine_dbg_sprintf("l%u", reg->regnum); case BWRITERSPR_PREDICATE: - return wine_dbg_sprintf("p%lu", reg->regnum); + return wine_dbg_sprintf("p%u", reg->regnum); default: - return wine_dbg_sprintf("unknown regname %#lx", reg->type); + return wine_dbg_sprintf("unknown regname %#x", reg->type); } }
-static const char *debug_print_writemask(DWORD mask) +static const char *debug_print_writemask(uint32_t mask) { char ret[6]; unsigned char pos = 1; @@ -271,11 +271,11 @@ static const char *debug_print_writemask(DWORD mask) return wine_dbg_sprintf("%s", ret); }
-static const char *debug_print_swizzle(DWORD arg) +static const char *debug_print_swizzle(uint32_t arg) { char ret[6]; unsigned int i; - DWORD swizzle[4]; + uint32_t swizzle[4];
switch (arg) { @@ -317,10 +317,10 @@ static const char *debug_print_relarg(const struct shader_reg *reg) const char *short_swizzle; if (!reg->rel_reg) return "";
- short_swizzle = debug_print_swizzle(reg->rel_reg->u.swizzle); + short_swizzle = debug_print_swizzle(reg->rel_reg->swizzle);
if (reg->rel_reg->type == BWRITERSPR_ADDR) - return wine_dbg_sprintf("[a%lu%s]", reg->rel_reg->regnum, short_swizzle); + return wine_dbg_sprintf("[a%u%s]", reg->rel_reg->regnum, short_swizzle); else if(reg->rel_reg->type == BWRITERSPR_LOOP && reg->rel_reg->regnum == 0) return wine_dbg_sprintf("[aL%s]", short_swizzle); else @@ -331,7 +331,7 @@ const char *debug_print_dstreg(const struct shader_reg *reg) { return wine_dbg_sprintf("%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_writemask(reg->u.writemask)); + debug_print_writemask(reg->writemask)); }
const char *debug_print_srcreg(const struct shader_reg *reg) @@ -341,64 +341,64 @@ const char *debug_print_srcreg(const struct shader_reg *reg) case BWRITERSPSM_NONE: return wine_dbg_sprintf("%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_NEG: return wine_dbg_sprintf("-%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_BIAS: return wine_dbg_sprintf("%s%s_bias%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_BIASNEG: return wine_dbg_sprintf("-%s%s_bias%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_SIGN: return wine_dbg_sprintf("%s%s_bx2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_SIGNNEG: return wine_dbg_sprintf("-%s%s_bx2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_COMP: return wine_dbg_sprintf("1 - %s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_X2: return wine_dbg_sprintf("%s%s_x2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_X2NEG: return wine_dbg_sprintf("-%s%s_x2%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_DZ: return wine_dbg_sprintf("%s%s_dz%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_DW: return wine_dbg_sprintf("%s%s_dw%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_ABS: return wine_dbg_sprintf("%s%s_abs%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_ABSNEG: return wine_dbg_sprintf("-%s%s_abs%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); case BWRITERSPSM_NOT: return wine_dbg_sprintf("!%s%s%s", get_regname(reg), debug_print_relarg(reg), - debug_print_swizzle(reg->u.swizzle)); + debug_print_swizzle(reg->swizzle)); } return "Unknown modifier"; }
-const char *debug_print_comp(DWORD comp) +const char *debug_print_comp(uint32_t comp) { switch (comp) { @@ -413,7 +413,7 @@ const char *debug_print_comp(DWORD comp) } }
-const char *debug_print_opcode(DWORD opcode) +const char *debug_print_opcode(uint32_t opcode) { switch (opcode) { @@ -507,28 +507,28 @@ const char *debug_print_opcode(DWORD opcode) } }
-void skip_dword_unknown(const char **ptr, unsigned int count) +void skip_u32_unknown(const char **ptr, unsigned int count) { unsigned int i; - DWORD d; + uint32_t u32;
- FIXME("Skipping %u unknown DWORDs:\n", count); + FIXME("Skipping %u unknown u32s:\n", count); for (i = 0; i < count; ++i) { - d = read_dword(ptr); - FIXME("\t0x%08lx\n", d); + u32 = read_u32(ptr); + FIXME("\t0x%08x\n", u32); } }
-static void write_dword_unknown(char **ptr, DWORD d) +static void write_u32_unknown(char **ptr, uint32_t u32) { - FIXME("Writing unknown DWORD 0x%08lx.\n", d); - write_dword(ptr, d); + FIXME("Writing unknown u32 0x%08x.\n", u32); + write_u32(ptr, u32); }
-HRESULT dxbc_add_section(struct dxbc *dxbc, DWORD tag, const char *data, DWORD data_size) +HRESULT dxbc_add_section(struct dxbc *dxbc, DWORD tag, const char *data, size_t data_size) { - TRACE("dxbc %p, tag %s, size %#lx.\n", dxbc, debugstr_an((const char *)&tag, 4), data_size); + TRACE("dxbc %p, tag %s, size %#Ix.\n", dxbc, debugstr_an((const char *)&tag, 4), data_size);
if (dxbc->count >= dxbc->size) { @@ -576,10 +576,10 @@ HRESULT dxbc_init(struct dxbc *dxbc, unsigned int size)
HRESULT dxbc_parse(const char *data, SIZE_T data_size, struct dxbc *dxbc) { + uint32_t tag, total_size, chunk_count; const char *ptr = data; - HRESULT hr; unsigned int i; - DWORD tag, total_size, chunk_count; + HRESULT hr;
if (!data) { @@ -587,7 +587,7 @@ HRESULT dxbc_parse(const char *data, SIZE_T data_size, struct dxbc *dxbc) return E_FAIL; }
- tag = read_dword(&ptr); + tag = read_u32(&ptr); TRACE("tag: %s.\n", debugstr_an((const char *)&tag, 4));
if (tag != TAG_DXBC) @@ -597,12 +597,12 @@ HRESULT dxbc_parse(const char *data, SIZE_T data_size, struct dxbc *dxbc) }
/* checksum? */ - skip_dword_unknown(&ptr, 4); + skip_u32_unknown(&ptr, 4);
- skip_dword_unknown(&ptr, 1); + skip_u32_unknown(&ptr, 1);
- total_size = read_dword(&ptr); - TRACE("total size: %#lx\n", total_size); + total_size = read_u32(&ptr); + TRACE("total size: %#x\n", total_size);
if (data_size != total_size) { @@ -610,8 +610,8 @@ HRESULT dxbc_parse(const char *data, SIZE_T data_size, struct dxbc *dxbc) return D3DERR_INVALIDCALL; }
- chunk_count = read_dword(&ptr); - TRACE("chunk count: %#lx\n", chunk_count); + chunk_count = read_u32(&ptr); + TRACE("chunk count: %#x\n", chunk_count);
hr = dxbc_init(dxbc, chunk_count); if (FAILED(hr)) @@ -622,17 +622,17 @@ HRESULT dxbc_parse(const char *data, SIZE_T data_size, struct dxbc *dxbc)
for (i = 0; i < chunk_count; ++i) { - DWORD chunk_tag, chunk_size; + uint32_t chunk_tag, chunk_size; const char *chunk_ptr; - DWORD chunk_offset; + uint32_t chunk_offset;
- chunk_offset = read_dword(&ptr); - TRACE("chunk %u at offset %#lx\n", i, chunk_offset); + chunk_offset = read_u32(&ptr); + TRACE("chunk %u at offset %#x\n", i, chunk_offset);
chunk_ptr = data + chunk_offset;
- chunk_tag = read_dword(&chunk_ptr); - chunk_size = read_dword(&chunk_ptr); + chunk_tag = read_u32(&chunk_ptr); + chunk_size = read_u32(&chunk_ptr);
hr = dxbc_add_section(dxbc, chunk_tag, chunk_ptr, chunk_size); if (FAILED(hr)) @@ -676,35 +676,35 @@ HRESULT dxbc_write_blob(struct dxbc *dxbc, ID3DBlob **blob)
ptr = ID3D10Blob_GetBufferPointer(object);
- write_dword(&ptr, TAG_DXBC); + write_u32(&ptr, TAG_DXBC);
/* signature(?) */ - write_dword_unknown(&ptr, 0); - write_dword_unknown(&ptr, 0); - write_dword_unknown(&ptr, 0); - write_dword_unknown(&ptr, 0); + write_u32_unknown(&ptr, 0); + write_u32_unknown(&ptr, 0); + write_u32_unknown(&ptr, 0); + write_u32_unknown(&ptr, 0);
/* seems to be always 1 */ - write_dword_unknown(&ptr, 1); + write_u32_unknown(&ptr, 1);
/* DXBC size */ - write_dword(&ptr, size); + write_u32(&ptr, size);
/* chunk count */ - write_dword(&ptr, dxbc->count); + write_u32(&ptr, dxbc->count);
/* write the chunk offsets */ for (i = 0; i < dxbc->count; ++i) { - write_dword(&ptr, offset); + write_u32(&ptr, offset); offset += 8 + dxbc->sections[i].data_size; }
/* write the chunks */ for (i = 0; i < dxbc->count; ++i) { - write_dword(&ptr, dxbc->sections[i].tag); - write_dword(&ptr, dxbc->sections[i].data_size); + write_u32(&ptr, dxbc->sections[i].tag); + write_u32(&ptr, dxbc->sections[i].data_size); memcpy(ptr, dxbc->sections[i].data, dxbc->sections[i].data_size); ptr += dxbc->sections[i].data_size; }