Petr Tesarik hat@tesarici.cz writes:
- The x86 spec states that a single-step interrupt (INT 1) is generated if the TF bit was set when the execution of the instruction BEGAN. This means that if the instruction changes the TF bit (e.g. popf), there is an INT 1, but the TF bit is not set any more. The only way to check whether the interrupt was generated because of the TF bit, is to check bit 15 in DR6.
I don't see why you can't still check the TF bit, it will be set 99% of the time, and fetching the DR6 register is quite expensive.
The following patch fixes all of these issues.
I'd really like to see test cases showing that Windows does things this way.