February 6, 2019 5:39 AM, "Józef Kucia" joseph.kucia@gmail.com wrote:
@@ -4662,6 +4680,72 @@ static void vkd3d_dxbc_compiler_emit_dcl_thread_group(struct
[...]
+static void vkd3d_dxbc_compiler_emit_hull_shader_main(struct vkd3d_dxbc_compiler *compiler) +{
- struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
- const struct vkd3d_shader_phase *phase;
- uint32_t void_id;
- unsigned int i;
- vkd3d_spirv_builder_begin_main_function(builder);
- void_id = vkd3d_spirv_get_op_type_void(builder);
- for (i = 0; i < compiler->shader_phase_count; ++i)
- {
phase = &compiler->shader_phases[i];
vkd3d_spirv_build_op_function_call(builder, void_id, phase->function_id, NULL, 0);
I was under the impression that multiple hull shader instances ran in parallel, sharing data with each other. Don't you need to emit control barriers between the phases so that their output will be synchronized? Or does the DXBC code already have barriers in it?
- }
- vkd3d_spirv_build_op_return(builder);
- vkd3d_spirv_build_op_function_end(builder);
+}
Chip