Signed-off-by: Conor McCarthy cmccarthy@codeweavers.com --- libs/vkd3d-shader/spirv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libs/vkd3d-shader/spirv.c b/libs/vkd3d-shader/spirv.c index 33e664cf..511f0c34 100644 --- a/libs/vkd3d-shader/spirv.c +++ b/libs/vkd3d-shader/spirv.c @@ -3393,7 +3393,7 @@ static uint32_t vkd3d_dxbc_compiler_emit_neg(struct vkd3d_dxbc_compiler *compile uint32_t type_id;
type_id = vkd3d_dxbc_compiler_get_type_id_for_reg(compiler, reg, write_mask); - if (reg->data_type == VKD3D_DATA_FLOAT) + if (reg->data_type == VKD3D_DATA_FLOAT || reg->data_type == VKD3D_DATA_DOUBLE) return vkd3d_spirv_build_op_fnegate(builder, type_id, val_id); else if (reg->data_type == VKD3D_DATA_INT) return vkd3d_spirv_build_op_snegate(builder, type_id, val_id);
Signed-off-by: Conor McCarthy cmccarthy@codeweavers.com --- libs/vkd3d-shader/dxbc.c | 4 ++++ libs/vkd3d-shader/spirv.c | 10 +++++++--- libs/vkd3d-shader/trace.c | 1 + libs/vkd3d-shader/vkd3d_shader_private.h | 7 +++++++ tests/d3d12.c | 2 +- 5 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/libs/vkd3d-shader/dxbc.c b/libs/vkd3d-shader/dxbc.c index e57cc413..0b6b5eea 100644 --- a/libs/vkd3d-shader/dxbc.c +++ b/libs/vkd3d-shader/dxbc.c @@ -311,6 +311,7 @@ enum vkd3d_sm4_opcode VKD3D_SM5_OP_IMM_ATOMIC_UMIN = 0xbd, VKD3D_SM5_OP_SYNC = 0xbe, VKD3D_SM5_OP_DEQ = 0xc3, + VKD3D_SM5_OP_DMOV = 0xc7, VKD3D_SM5_OP_EVAL_SAMPLE_INDEX = 0xcc, VKD3D_SM5_OP_EVAL_CENTROID = 0xcd, VKD3D_SM5_OP_DCL_GS_INSTANCES = 0xce, @@ -1250,6 +1251,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] = {VKD3D_SM5_OP_SYNC, VKD3DSIH_SYNC, "", "", shader_sm5_read_sync}, {VKD3D_SM5_OP_DEQ, VKD3DSIH_DEQ, "u", "dd"}, + {VKD3D_SM5_OP_DMOV, VKD3DSIH_DMOV, "d", "d"}, {VKD3D_SM5_OP_EVAL_SAMPLE_INDEX, VKD3DSIH_EVAL_SAMPLE_INDEX, "f", "fi"}, {VKD3D_SM5_OP_EVAL_CENTROID, VKD3DSIH_EVAL_CENTROID, "f", "f"}, {VKD3D_SM5_OP_DCL_GS_INSTANCES, VKD3DSIH_DCL_GS_INSTANCES, "", "", @@ -1804,6 +1806,8 @@ static bool shader_sm4_read_dst_param(struct vkd3d_sm4_data *priv, const DWORD * }
dst_param->write_mask = (token & VKD3D_SM4_WRITEMASK_MASK) >> VKD3D_SM4_WRITEMASK_SHIFT; + if (data_type == VKD3D_DATA_DOUBLE) + dst_param->write_mask = vkd3d_write_mask_64_from_32(dst_param->write_mask); /* Scalar registers are declared with no write mask in shader bytecode. */ if (!dst_param->write_mask && shader_sm4_is_scalar_register(&dst_param->reg)) dst_param->write_mask = VKD3DSP_WRITEMASK_0; diff --git a/libs/vkd3d-shader/spirv.c b/libs/vkd3d-shader/spirv.c index 511f0c34..ce283739 100644 --- a/libs/vkd3d-shader/spirv.c +++ b/libs/vkd3d-shader/spirv.c @@ -3525,6 +3525,7 @@ static void vkd3d_dxbc_compiler_emit_store_reg(struct vkd3d_dxbc_compiler *compi struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; enum vkd3d_shader_component_type component_type; struct vkd3d_shader_register_info reg_info; + unsigned int src_write_mask = write_mask; uint32_t type_id;
assert(reg->type != VKD3DSPR_IMMCONST); @@ -3536,14 +3537,16 @@ static void vkd3d_dxbc_compiler_emit_store_reg(struct vkd3d_dxbc_compiler *compi component_type = vkd3d_component_type_from_data_type(reg->data_type); if (component_type != reg_info.component_type) { - unsigned int component_count = vkd3d_write_mask_component_count(write_mask); - type_id = vkd3d_spirv_get_type_id(builder, reg_info.component_type, component_count); + if (reg->data_type == VKD3D_DATA_DOUBLE) + src_write_mask = vkd3d_write_mask_32_from_64(write_mask); + type_id = vkd3d_spirv_get_type_id(builder, reg_info.component_type, + vkd3d_write_mask_component_count(src_write_mask)); val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id); component_type = reg_info.component_type; }
vkd3d_dxbc_compiler_emit_store(compiler, - reg_info.id, reg_info.write_mask, component_type, reg_info.storage_class, write_mask, val_id); + reg_info.id, reg_info.write_mask, component_type, reg_info.storage_class, src_write_mask, val_id); }
static uint32_t vkd3d_dxbc_compiler_emit_sat(struct vkd3d_dxbc_compiler *compiler, @@ -9184,6 +9187,7 @@ int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler, case VKD3DSIH_HS_JOIN_PHASE: vkd3d_dxbc_compiler_enter_shader_phase(compiler, instruction); break; + case VKD3DSIH_DMOV: case VKD3DSIH_MOV: vkd3d_dxbc_compiler_emit_mov(compiler, instruction); break; diff --git a/libs/vkd3d-shader/trace.c b/libs/vkd3d-shader/trace.c index 556654ec..3065dac4 100644 --- a/libs/vkd3d-shader/trace.c +++ b/libs/vkd3d-shader/trace.c @@ -105,6 +105,7 @@ static const char * const shader_opcode_names[] = /* VKD3DSIH_DEFI */ "defi", /* VKD3DSIH_DEQ */ "deq", /* VKD3DSIH_DIV */ "div", + /* VKD3DSIH_DMOV */ "dmov", /* VKD3DSIH_DP2 */ "dp2", /* VKD3DSIH_DP2ADD */ "dp2add", /* VKD3DSIH_DP3 */ "dp3", diff --git a/libs/vkd3d-shader/vkd3d_shader_private.h b/libs/vkd3d-shader/vkd3d_shader_private.h index f5d22c5c..4173e246 100644 --- a/libs/vkd3d-shader/vkd3d_shader_private.h +++ b/libs/vkd3d-shader/vkd3d_shader_private.h @@ -192,6 +192,7 @@ enum vkd3d_shader_opcode VKD3DSIH_DEFI, VKD3DSIH_DEQ, VKD3DSIH_DIV, + VKD3DSIH_DMOV, VKD3DSIH_DP2, VKD3DSIH_DP2ADD, VKD3DSIH_DP3, @@ -1033,6 +1034,12 @@ static inline unsigned int vkd3d_write_mask_from_component_count(unsigned int co return (VKD3DSP_WRITEMASK_0 << component_count) - 1; }
+static inline unsigned int vkd3d_write_mask_64_from_32(DWORD write_mask32) +{ + unsigned int write_mask64 = write_mask32 | (write_mask32 >> 1); + return (write_mask64 & VKD3DSP_WRITEMASK_0) | ((write_mask64 & VKD3DSP_WRITEMASK_2) >> 1); +} + static inline unsigned int vkd3d_write_mask_32_from_64(unsigned int write_mask64) { unsigned int write_mask32 = (write_mask64 | (write_mask64 << 1)) diff --git a/tests/d3d12.c b/tests/d3d12.c index f14114d1..e418b3c3 100644 --- a/tests/d3d12.c +++ b/tests/d3d12.c @@ -9872,7 +9872,7 @@ static void test_shader_instructions(void) {&ps_movc, {{{0, 1, 1, 0}, {1, 2, 3, 4}, {5, 6, 7, 8}}}, {{5, 2, 3, 8}}}, {&ps_movc, {{{1, 1, 1, 1}, {1, 2, 3, 4}, {5, 6, 7, 8}}}, {{1, 2, 3, 4}}},
- {&ps_dmov, {.d = {{2.5 + 1.0e-9, -3.5 - 1.0e-9}}}, {.d = {3.5 + 1.0e-9, -2.5 - 1.0e-9}}, true, true}, + {&ps_dmov, {.d = {{2.5 + 1.0e-9, -3.5 - 1.0e-9}}}, {.d = {3.5 + 1.0e-9, -2.5 - 1.0e-9}}, true}, {&ps_dadd, {.d = {{2.5, 0.0}}}, {.d = {2.5 + 1.0000002433080226, 2.5 + 2.000000481493771}}, true, true}, {&ps_dmin_dmax, {.d = {{-1.0, 1.0}}}, {.d = {-1.0, 1.0}}, true, true}, {&ps_dmovc, {.d = {{0.5, 0.0}}}, {.d = {4.5, 4.5}}, true, true},
On Fri, 23 Jul 2021 at 07:32, Conor McCarthy cmccarthy@codeweavers.com wrote:
@@ -1804,6 +1806,8 @@ static bool shader_sm4_read_dst_param(struct vkd3d_sm4_data *priv, const DWORD * }
dst_param->write_mask = (token & VKD3D_SM4_WRITEMASK_MASK) >> VKD3D_SM4_WRITEMASK_SHIFT;
- if (data_type == VKD3D_DATA_DOUBLE)
/* Scalar registers are declared with no write mask in shader bytecode. */ if (!dst_param->write_mask && shader_sm4_is_scalar_register(&dst_param->reg)) dst_param->write_mask = VKD3DSP_WRITEMASK_0;dst_param->write_mask = vkd3d_write_mask_64_from_32(dst_param->write_mask);
Sure, but this would disassemble e.g. "dmov r0.xyzw, -cb0[0].zwxy" (fxc /dumpbin) as "dmov r0.xy, -cb0[0].zwxy" (vkd3d-compiler -b d3d-asm), unless we also add a corresponding change to shader_dump_dst_param().
July 27, 2021 1:17 AM, "Henri Verbeet" hverbeet@gmail.com wrote:
Sure, but this would disassemble e.g. "dmov r0.xyzw, -cb0[0].zwxy" (fxc /dumpbin) as "dmov r0.xy, -cb0[0].zwxy" (vkd3d-compiler -b d3d-asm), unless we also add a corresponding change to shader_dump_dst_param().
Would you suggest including the shader_dump_dst_param() change in the same patch, or a separate patch in the same set?
On Tue, 27 Jul 2021 at 03:28, Conor McCarthy cmccarthy@codeweavers.com wrote:
July 27, 2021 1:17 AM, "Henri Verbeet" hverbeet@gmail.com wrote:
Sure, but this would disassemble e.g. "dmov r0.xyzw, -cb0[0].zwxy" (fxc /dumpbin) as "dmov r0.xy, -cb0[0].zwxy" (vkd3d-compiler -b d3d-asm), unless we also add a corresponding change to shader_dump_dst_param().
Would you suggest including the shader_dump_dst_param() change in the same patch, or a separate patch in the same set?
It should be in the same patch as the shader_sm4_read_dst_param() change, but otherwise there are some options. E.g., one way to introduce the double support would be to first write a series introducing disassembler support (i.e., the dxbc.c and trace.c changes), and then a second series for SPIR-V generation. A single patch per instruction like this one for dmov also works though, as long as the dxbc.c and trace.c changes are trivial enough.