[PATCH vkd3d 1/5] vkd3d-shader: Write SM1 constant instructions.

[Zebediah Figura]

Signed-off-by: Zebediah Figura 
---
 libs/vkd3d-shader/hlsl_codegen.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c
index 05aea217..f6628a2e 100644
--- a/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d-shader/hlsl_codegen.c
@@ -1663,6 +1663,29 @@ static void write_sm1_semantic_dcls(struct hlsl_ctx *ctx, struct bytecode_buffer
     }
 }

+static void write_sm1_constant(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer, const struct hlsl_ir_node *instr)
+{
+    const struct hlsl_ir_constant *constant = hlsl_ir_constant(instr);
+    struct sm1_instruction sm1_instr =
+    {
+        .opcode = D3DSIO_MOV,
+
+        .dst.type = D3DSPR_TEMP,
+        .dst.reg = instr->reg.id,
+        .dst.writemask = instr->reg.writemask,
+        .has_dst = 1,
+
+        .srcs[0].type = D3DSPR_CONST,
+        .srcs[0].reg = constant->reg.id,
+        .srcs[0].swizzle = swizzle_from_writemask(constant->reg.writemask),
+        .src_count = 1,
+    };
+
+    assert(instr->reg.allocated);
+    assert(constant->reg.allocated);
+    write_sm1_instruction(ctx, buffer, &sm1_instr);
+}
+
 static void write_sm1_load(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer, const struct hlsl_ir_node *instr)
 {
     const struct hlsl_ir_load *load = hlsl_ir_load(instr);
@@ -1768,6 +1791,10 @@ static void write_sm1_instructions(struct hlsl_ctx *ctx, struct bytecode_buffer

switch (instr->type)
         {
+            case HLSL_IR_CONSTANT:
+                write_sm1_constant(ctx, buffer, instr);
+                break;
+
             case HLSL_IR_LOAD:
                 write_sm1_load(ctx, buffer, instr);
                 break;

[PATCH vkd3d 2/5] vkd3d-shader: Write SM1 swizzle instructions.

[Zebediah Figura]

Signed-off-by: Zebediah Figura 
---
 libs/vkd3d-shader/hlsl_codegen.c | 40 ++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c
index f6628a2e..57173147 100644
--- a/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d-shader/hlsl_codegen.c
@@ -1159,6 +1159,17 @@ static unsigned int combine_writemasks(unsigned int first, unsigned int second)
     return ret;
 }

+static unsigned int combine_swizzles(unsigned int first, unsigned int second, unsigned int dim)
+{
+    unsigned int ret = 0, i;
+    for (i = 0; i < dim; ++i)
+    {
+        unsigned int s = (second >> (i * 2)) & 3;
+        ret |= ((first >> (s * 2)) & 3) << (i * 2);
+    }
+    return ret;
+}
+
 static bool type_is_single_reg(const struct hlsl_type *type)
 {
     return type->type == HLSL_CLASS_SCALAR || type->type == HLSL_CLASS_VECTOR;
@@ -1771,6 +1782,31 @@ static void write_sm1_store(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer
     write_sm1_instruction(ctx, buffer, &sm1_instr);
 }

+static void write_sm1_swizzle(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer, const struct hlsl_ir_node *instr)
+{
+    const struct hlsl_ir_swizzle *swizzle = hlsl_ir_swizzle(instr);
+    const struct hlsl_ir_node *val = swizzle->val.node;
+    struct sm1_instruction sm1_instr =
+    {
+        .opcode = D3DSIO_MOV,
+
+        .dst.type = D3DSPR_TEMP,
+        .dst.reg = instr->reg.id,
+        .dst.writemask = instr->reg.writemask,
+        .has_dst = 1,
+
+        .srcs[0].type = D3DSPR_TEMP,
+        .srcs[0].reg = val->reg.id,
+        .srcs[0].swizzle = combine_swizzles(swizzle_from_writemask(val->reg.writemask),
+                swizzle->swizzle, instr->data_type->dimx),
+        .src_count = 1,
+    };
+
+    assert(instr->reg.allocated);
+    assert(val->reg.allocated);
+    write_sm1_instruction(ctx, buffer, &sm1_instr);
+}
+
 static void write_sm1_instructions(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer,
         const struct hlsl_ir_function_decl *entry_func)
 {
@@ -1803,6 +1839,10 @@ static void write_sm1_instructions(struct hlsl_ctx *ctx, struct bytecode_buffer
                 write_sm1_store(ctx, buffer, instr);
                 break;

+            case HLSL_IR_SWIZZLE:
+                write_sm1_swizzle(ctx, buffer, instr);
+                break;
+
             default:
                 FIXME("Unhandled instruction type %s.\n", hlsl_node_type_to_string(instr->type));
         }

[PATCH vkd3d 2/5] vkd3d-shader: Write SM1 swizzle instructions.

[Matteo Bruni]

Signed-off-by: Matteo Bruni

[PATCH vkd3d 2/5] vkd3d-shader: Write SM1 swizzle instructions.

[Henri Verbeet]

Signed-off-by: Henri Verbeet

[PATCH vkd3d 3/5] vkd3d-shader: Write SM1 addition instructions.

[Zebediah Figura]

Signed-off-by: Zebediah Figura 
---
 libs/vkd3d-shader/hlsl_codegen.c | 54 ++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c
index 57173147..166e5f56 100644
--- a/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d-shader/hlsl_codegen.c
@@ -1594,6 +1594,30 @@ static void write_sm1_instruction(struct hlsl_ctx *ctx, struct bytecode_buffer *
         write_sm1_src_register(buffer, &instr->srcs[i], instr->dst.writemask);
 };

+static void write_sm1_binary_op(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer,
+        D3DSHADER_INSTRUCTION_OPCODE_TYPE opcode, const struct hlsl_reg *dst,
+        const struct hlsl_reg *src1, const struct hlsl_reg *src2)
+{
+    const struct sm1_instruction instr =
+    {
+        .opcode = opcode,
+
+        .dst.type = D3DSPR_TEMP,
+        .dst.writemask = dst->writemask,
+        .dst.reg = dst->id,
+        .has_dst = 1,
+
+        .srcs[0].type = D3DSPR_TEMP,
+        .srcs[0].swizzle = swizzle_from_writemask(src1->writemask),
+        .srcs[0].reg = src1->id,
+        .srcs[1].type = D3DSPR_TEMP,
+        .srcs[1].swizzle = swizzle_from_writemask(src2->writemask),
+        .srcs[1].reg = src2->id,
+        .src_count = 2,
+    };
+    write_sm1_instruction(ctx, buffer, &instr);
+}
+
 static void write_sm1_constant_defs(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer)
 {
     unsigned int i, x;
@@ -1697,6 +1721,32 @@ static void write_sm1_constant(struct hlsl_ctx *ctx, struct bytecode_buffer *buf
     write_sm1_instruction(ctx, buffer, &sm1_instr);
 }

+static void write_sm1_expr(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer, const struct hlsl_ir_node *instr)
+{
+    struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
+    struct hlsl_ir_node *arg1 = expr->operands[0].node;
+    struct hlsl_ir_node *arg2 = expr->operands[1].node;
+
+    assert(instr->reg.allocated);
+
+    if (instr->data_type->base_type != HLSL_TYPE_FLOAT)
+    {
+        FIXME("Non-float operations need to be lowered.\n");
+        return;
+    }
+
+    switch (expr->op)
+    {
+        case HLSL_IR_BINOP_ADD:
+            write_sm1_binary_op(ctx, buffer, D3DSIO_ADD, &instr->reg, &arg1->reg, &arg2->reg);
+            break;
+
+        default:
+            FIXME("Unhandled op %u.\n", expr->op);
+            break;
+    }
+}
+
 static void write_sm1_load(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer, const struct hlsl_ir_node *instr)
 {
     const struct hlsl_ir_load *load = hlsl_ir_load(instr);
@@ -1831,6 +1881,10 @@ static void write_sm1_instructions(struct hlsl_ctx *ctx, struct bytecode_buffer
                 write_sm1_constant(ctx, buffer, instr);
                 break;

+            case HLSL_IR_EXPR:
+                write_sm1_expr(ctx, buffer, instr);
+                break;
+
             case HLSL_IR_LOAD:
                 write_sm1_load(ctx, buffer, instr);
                 break;

[PATCH vkd3d 3/5] vkd3d-shader: Write SM1 addition instructions.

[Matteo Bruni]

Signed-off-by: Matteo Bruni

[PATCH vkd3d 3/5] vkd3d-shader: Write SM1 addition instructions.

[Henri Verbeet]

Signed-off-by: Henri Verbeet

[PATCH vkd3d 4/5] vkd3d-shader: Write SM1 multiplication instructions.

[Zebediah Figura]

Signed-off-by: Zebediah Figura 
---
 libs/vkd3d-shader/hlsl_codegen.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c
index 166e5f56..64910662 100644
--- a/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d-shader/hlsl_codegen.c
@@ -1741,6 +1741,10 @@ static void write_sm1_expr(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer,
             write_sm1_binary_op(ctx, buffer, D3DSIO_ADD, &instr->reg, &arg1->reg, &arg2->reg);
             break;

+        case HLSL_IR_BINOP_MUL:
+            write_sm1_binary_op(ctx, buffer, D3DSIO_MUL, &instr->reg, &arg1->reg, &arg2->reg);
+            break;
+
         default:
             FIXME("Unhandled op %u.\n", expr->op);
             break;

[PATCH vkd3d 4/5] vkd3d-shader: Write SM1 multiplication instructions.

[Matteo Bruni]

Signed-off-by: Matteo Bruni

[PATCH vkd3d 4/5] vkd3d-shader: Write SM1 multiplication instructions.

[Henri Verbeet]

Signed-off-by: Henri Verbeet

[PATCH vkd3d 5/5] vkd3d-shader: Write SM1 negation instructions.

[Zebediah Figura]

Signed-off-by: Zebediah Figura 
---
 libs/vkd3d-shader/hlsl_codegen.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c
index 64910662..c2cedd2a 100644
--- a/libs/vkd3d-shader/hlsl_codegen.c
+++ b/libs/vkd3d-shader/hlsl_codegen.c
@@ -1618,6 +1618,28 @@ static void write_sm1_binary_op(struct hlsl_ctx *ctx, struct bytecode_buffer *bu
     write_sm1_instruction(ctx, buffer, &instr);
 }

+static void write_sm1_unary_op(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer,
+        D3DSHADER_INSTRUCTION_OPCODE_TYPE opcode, const struct hlsl_reg *dst,
+        const struct hlsl_reg *src, D3DSHADER_PARAM_SRCMOD_TYPE src_mod)
+{
+    const struct sm1_instruction instr =
+    {
+        .opcode = opcode,
+
+        .dst.type = D3DSPR_TEMP,
+        .dst.writemask = dst->writemask,
+        .dst.reg = dst->id,
+        .has_dst = 1,
+
+        .srcs[0].type = D3DSPR_TEMP,
+        .srcs[0].swizzle = swizzle_from_writemask(src->writemask),
+        .srcs[0].reg = src->id,
+        .srcs[0].mod = src_mod,
+        .src_count = 1,
+    };
+    write_sm1_instruction(ctx, buffer, &instr);
+}
+
 static void write_sm1_constant_defs(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer)
 {
     unsigned int i, x;
@@ -1745,6 +1767,10 @@ static void write_sm1_expr(struct hlsl_ctx *ctx, struct bytecode_buffer *buffer,
             write_sm1_binary_op(ctx, buffer, D3DSIO_MUL, &instr->reg, &arg1->reg, &arg2->reg);
             break;

+        case HLSL_IR_UNOP_NEG:
+            write_sm1_unary_op(ctx, buffer, D3DSIO_MOV, &instr->reg, &arg1->reg, D3DSPSM_NEG);
+            break;
+
         default:
             FIXME("Unhandled op %u.\n", expr->op);
             break;

[PATCH vkd3d 5/5] vkd3d-shader: Write SM1 negation instructions.

[Matteo Bruni]

Signed-off-by: Matteo Bruni

[PATCH vkd3d 5/5] vkd3d-shader: Write SM1 negation instructions.

[Henri Verbeet]

Signed-off-by: Henri Verbeet

[Matteo Bruni]

Signed-off-by: Matteo Bruni

[Henri Verbeet]

Signed-off-by: Henri Verbeet