[PATCH v4 0/10] MR281: vkd3d-shader/tpf: Replace sm4 register structs with vkd3d-shader register structs, part 1.

[Francisco Casas (＠fcasas)]

Recap:

I implemented relative addressing in !229, but I was suggested to handle register indexes by moving all the registers to the heap, which I did in my [nonconst-offsets-6](https://gitlab.winehq.org/fcasas/vkd3d/-/commits/nonconst-offsets-6) branch. A part of this implementation required !269, but I was asked to try to turn the sm4 register structs into the vkd3d-shader register structs instead, to get closer to a common low level IR.

This is the first part of that transformation. The whole thing is in my [use_vkd3d_reg](https://gitlab.winehq.org/fcasas/vkd3d/-/commits/use_vkd3d_reg) branch.

~~This is built on top of !225 (the first two patches), so it may be good to get that upstream first.~~

---

This patch series aims to do the following replacements:
```
struct sm4_register -> struct vkd3d_shader_register
struct sm4_dst_register -> struct vkd3d_shader_dst_param
struct sm4_src_register -> struct vkd3d_shader_src_param
```
to get us closer to a common level IR and simplify the implementation of relative-addressing.

To achieve this, the fields in the sm4 register structs are replaced with fields in the vkd3d-shader structs or removed altogether, one at the time.

As can be seen when looking at the whole branch, it is possible to do this transformation without having to add additional fields to `struct vkd3d_shader_register`, by restricting each register type to a single `enum vkd3d_sm4_dimension` (and its src registers to a single `enum vkd3d_sm4_swizzle_type`) by default.

The only exception we need so far is for sampler registers: They always have dimension NONE, except when used as arguments of gather instructions, in which case they have dimension VEC4 and SCALAR swizzle. This, and similar exceptions we may find in the future, can be handled using the opcode_info, as in 7/8 [81e17506](https://gitlab.winehq.org/fcasas/vkd3d/-/commit/81e17506ba2cb1fbf4d021159ab1...).

--
  v4: vkd3d-shader/tpf: Get rid of sm4_register.dim.
      vkd3d-shader/tpf: Use 's' in src_info to expect sampler register with vec4 dimension.
      vkd3d-shader/tpf: Separate dst register write function.
      vkd3d-shader/tpf: Separate src register write function.
      vkd3d-shader/tpf: Make register_type_table an array of structs with lookup tables.
      vkd3d-shader/tpf: Pass ctx to sm4_encode_register().

https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/281

[PATCH v4 01/10] vkd3d-shader/tpf: Rename VKD3D_SM4_SWIZZLE_NONE as VKD3D_SM4_SWIZZLE_MASK4.

[Conor McCarthy]

From: Conor McCarthy

---
 libs/vkd3d-shader/tpf.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 4be2f8b8..30ad0825 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -505,7 +505,7 @@ enum vkd3d_sm4_input_primitive_type

enum vkd3d_sm4_swizzle_type
 {
-    VKD3D_SM4_SWIZZLE_NONE            = 0x0,
+    VKD3D_SM4_SWIZZLE_MASK4           = 0x0,
     VKD3D_SM4_SWIZZLE_VEC4            = 0x1,
     VKD3D_SM4_SWIZZLE_SCALAR          = 0x2,
 };
@@ -1981,7 +1981,7 @@ static bool shader_sm4_read_src_param(struct vkd3d_shader_sm4_parser *priv, cons

switch (swizzle_type)
         {
-            case VKD3D_SM4_SWIZZLE_NONE:
+            case VKD3D_SM4_SWIZZLE_MASK4:
                 if (shader_sm4_is_scalar_register(&src_param->reg))
                     src_param->swizzle = VKD3D_SHADER_SWIZZLE(X, X, X, X);
                 else
@@ -2534,19 +2534,19 @@ bool hlsl_sm4_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_sem
     }
     register_table[] =
     {
-        {"sv_dispatchthreadid", false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4, VKD3D_SM5_RT_THREAD_ID,         false},
-        {"sv_groupid",          false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4, VKD3D_SM5_RT_THREAD_GROUP_ID,   false},
-        {"sv_groupthreadid",    false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4, VKD3D_SM5_RT_LOCAL_THREAD_ID,   false},
+        {"sv_dispatchthreadid", false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM5_RT_THREAD_ID,         false},
+        {"sv_groupid",          false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM5_RT_THREAD_GROUP_ID,   false},
+        {"sv_groupthreadid",    false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM5_RT_LOCAL_THREAD_ID,   false},

-        {"sv_primitiveid",      false, VKD3D_SHADER_TYPE_GEOMETRY,  VKD3D_SM4_SWIZZLE_NONE, VKD3D_SM4_RT_PRIMID,            false},
+        {"sv_primitiveid",      false, VKD3D_SHADER_TYPE_GEOMETRY,  VKD3D_SM4_SWIZZLE_MASK4, VKD3D_SM4_RT_PRIMID,            false},

/* Put sv_target in this table, instead of letting it fall through to
          * default varying allocation, so that the register index matches the
          * usage index. */
-        {"color",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3D_SM4_RT_OUTPUT,            true},
-        {"depth",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3D_SM4_RT_DEPTHOUT,          false},
-        {"sv_depth",            true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3D_SM4_RT_DEPTHOUT,          false},
-        {"sv_target",           true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3D_SM4_RT_OUTPUT,            true},
+        {"color",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_OUTPUT,            true},
+        {"depth",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_DEPTHOUT,          false},
+        {"sv_depth",            true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_DEPTHOUT,          false},
+        {"sv_target",           true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_OUTPUT,            true},
     };

for (i = 0; i < ARRAY_SIZE(register_table); ++i)
@@ -3507,7 +3507,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             reg->type = VKD3D_SM4_RT_SAMPLER;
             reg->dim = VKD3D_SM4_DIMENSION_NONE;
             if (swizzle_type)
-                *swizzle_type = VKD3D_SM4_SWIZZLE_NONE;
+                *swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
             reg->idx[0] = var->regs[HLSL_REGSET_SAMPLERS].id;
             reg->idx[0] += hlsl_offset_from_deref_safe(ctx, deref);
             assert(regset == HLSL_REGSET_SAMPLERS);
@@ -3639,7 +3639,7 @@ static void sm4_dst_from_node(struct sm4_dst_register *dst, const struct hlsl_ir
 static void sm4_src_from_constant_value(struct sm4_src_register *src,
         const struct hlsl_constant_value *value, unsigned int width, unsigned int map_writemask)
 {
-    src->swizzle_type = VKD3D_SM4_SWIZZLE_NONE;
+    src->swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
     src->reg.type = VKD3D_SM4_RT_IMMCONST;
     if (width == 1)
     {
@@ -4198,7 +4198,7 @@ static void write_sm4_ld(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buf
             index = hlsl_ir_constant(sample_index);

memset(&instr.srcs[2], 0, sizeof(instr.srcs[2]));
-            instr.srcs[2].swizzle_type = VKD3D_SM4_SWIZZLE_NONE;
+            instr.srcs[2].swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
             reg->type = VKD3D_SM4_RT_IMMCONST;
             reg->dim = VKD3D_SM4_DIMENSION_SCALAR;
             reg->immconst_uint[0] = index->value.u[0].u;
@@ -4317,7 +4317,7 @@ static void write_sm4_cast_from_bool(struct hlsl_ctx *ctx,
     instr.dst_count = 1;

sm4_src_from_node(&instr.srcs[0], arg, instr.dsts[0].writemask);
-    instr.srcs[1].swizzle_type = VKD3D_SM4_SWIZZLE_NONE;
+    instr.srcs[1].swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
     instr.srcs[1].reg.type = VKD3D_SM4_RT_IMMCONST;
     instr.srcs[1].reg.dim = VKD3D_SM4_DIMENSION_SCALAR;
     instr.srcs[1].reg.immconst_uint[0] = mask;

[PATCH v4 02/10] vkd3d-shader/tpf: Use enum vkd3d_shader_register_type in sm4_register.type.

[Francisco Casas]

From: Francisco Casas

---
 libs/vkd3d-shader/hlsl.h |  2 +-
 libs/vkd3d-shader/tpf.c  | 83 ++++++++++++++++++++++++----------------
 2 files changed, 50 insertions(+), 35 deletions(-)

diff --git a/libs/vkd3d-shader/hlsl.h b/libs/vkd3d-shader/hlsl.h
index ab91974a..668690bd 100644
--- a/libs/vkd3d-shader/hlsl.h
+++ b/libs/vkd3d-shader/hlsl.h
@@ -1249,7 +1249,7 @@ int hlsl_sm1_write(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_fun
 bool hlsl_sm4_usage_from_semantic(struct hlsl_ctx *ctx,
         const struct hlsl_semantic *semantic, bool output, D3D_NAME *usage);
 bool hlsl_sm4_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_semantic *semantic,
-        bool output, unsigned int *type, enum vkd3d_sm4_swizzle_type *swizzle_type, bool *has_idx);
+        bool output, enum vkd3d_shader_register_type *type, enum vkd3d_sm4_swizzle_type *swizzle_type, bool *has_idx);
 int hlsl_sm4_write(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func, struct vkd3d_shader_code *out);

int hlsl_lexer_compile(struct hlsl_ctx *ctx, const struct vkd3d_shader_code *hlsl);
diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 30ad0825..0071989e 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -2519,7 +2519,7 @@ static bool type_is_integer(const struct hlsl_type *type)
 }

bool hlsl_sm4_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_semantic *semantic,
-        bool output, unsigned int *type, enum vkd3d_sm4_swizzle_type *swizzle_type, bool *has_idx)
+        bool output, enum vkd3d_shader_register_type *type, enum vkd3d_sm4_swizzle_type *swizzle_type, bool *has_idx)
 {
     unsigned int i;

@@ -2529,24 +2529,24 @@ bool hlsl_sm4_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_sem
         bool output;
         enum vkd3d_shader_type shader_type;
         enum vkd3d_sm4_swizzle_type swizzle_type;
-        enum vkd3d_sm4_register_type type;
+        enum vkd3d_shader_register_type type;
         bool has_idx;
     }
     register_table[] =
     {
-        {"sv_dispatchthreadid", false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM5_RT_THREAD_ID,         false},
-        {"sv_groupid",          false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM5_RT_THREAD_GROUP_ID,   false},
-        {"sv_groupthreadid",    false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM5_RT_LOCAL_THREAD_ID,   false},
+        {"sv_dispatchthreadid", false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4, VKD3DSPR_THREADID,          false},
+        {"sv_groupid",          false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4, VKD3DSPR_THREADGROUPID,     false},
+        {"sv_groupthreadid",    false, VKD3D_SHADER_TYPE_COMPUTE,   VKD3D_SM4_SWIZZLE_VEC4, VKD3DSPR_LOCALTHREADID,     false},

-        {"sv_primitiveid",      false, VKD3D_SHADER_TYPE_GEOMETRY,  VKD3D_SM4_SWIZZLE_MASK4, VKD3D_SM4_RT_PRIMID,            false},
+        {"sv_primitiveid",      false, VKD3D_SHADER_TYPE_GEOMETRY,  VKD3D_SM4_SWIZZLE_MASK4, VKD3DSPR_PRIMID,           false},

/* Put sv_target in this table, instead of letting it fall through to
          * default varying allocation, so that the register index matches the
          * usage index. */
-        {"color",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_OUTPUT,            true},
-        {"depth",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_DEPTHOUT,          false},
-        {"sv_depth",            true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_DEPTHOUT,          false},
-        {"sv_target",           true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4,  VKD3D_SM4_RT_OUTPUT,            true},
+        {"color",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3DSPR_OUTPUT,            true},
+        {"depth",               true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3DSPR_DEPTHOUT,          false},
+        {"sv_depth",            true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3DSPR_DEPTHOUT,          false},
+        {"sv_target",           true,  VKD3D_SHADER_TYPE_PIXEL,     VKD3D_SM4_SWIZZLE_VEC4, VKD3DSPR_OUTPUT,            true},
     };

for (i = 0; i < ARRAY_SIZE(register_table); ++i)
@@ -2652,7 +2652,7 @@ static void write_sm4_signature(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc,
     LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
     {
         unsigned int width = (1u << var->data_type->dimx) - 1, use_mask;
-        enum vkd3d_sm4_register_type type;
+        enum vkd3d_shader_register_type type;
         uint32_t usage_idx, reg_idx;
         D3D_NAME usage;
         bool has_idx;
@@ -3431,7 +3431,7 @@ static uint32_t sm4_encode_instruction_modifier(const struct sm4_instruction_mod

struct sm4_register
 {
-    enum vkd3d_sm4_register_type type;
+    enum vkd3d_shader_register_type type;
     uint32_t idx[2];
     unsigned int idx_count;
     enum vkd3d_sm4_dimension dim;
@@ -3480,7 +3480,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r

if (regset == HLSL_REGSET_TEXTURES)
         {
-            reg->type = VKD3D_SM4_RT_RESOURCE;
+            reg->type = VKD3DSPR_RESOURCE;
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
@@ -3492,7 +3492,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
         }
         else if (regset == HLSL_REGSET_UAVS)
         {
-            reg->type = VKD3D_SM5_RT_UAV;
+            reg->type = VKD3DSPR_UAV;
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
@@ -3504,7 +3504,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
         }
         else if (regset == HLSL_REGSET_SAMPLERS)
         {
-            reg->type = VKD3D_SM4_RT_SAMPLER;
+            reg->type = VKD3DSPR_SAMPLER;
             reg->dim = VKD3D_SM4_DIMENSION_NONE;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
@@ -3519,7 +3519,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             unsigned int offset = hlsl_offset_from_deref_safe(ctx, deref) + var->buffer_offset;

assert(data_type->class <= HLSL_CLASS_VECTOR);
-            reg->type = VKD3D_SM4_RT_CONSTBUFFER;
+            reg->type = VKD3DSPR_CONSTBUFFER;
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
@@ -3551,7 +3551,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             struct hlsl_reg hlsl_reg = hlsl_reg_from_deref(ctx, deref);

assert(hlsl_reg.allocated);
-            reg->type = VKD3D_SM4_RT_INPUT;
+            reg->type = VKD3DSPR_INPUT;
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
@@ -3574,7 +3574,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
                 reg->idx_count = 1;
             }

-            if (reg->type == VKD3D_SM4_RT_DEPTHOUT)
+            if (reg->type == VKD3DSPR_DEPTHOUT)
                 reg->dim = VKD3D_SM4_DIMENSION_SCALAR;
             else
                 reg->dim = VKD3D_SM4_DIMENSION_VEC4;
@@ -3585,7 +3585,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             struct hlsl_reg hlsl_reg = hlsl_reg_from_deref(ctx, deref);

assert(hlsl_reg.allocated);
-            reg->type = VKD3D_SM4_RT_OUTPUT;
+            reg->type = VKD3DSPR_OUTPUT;
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             reg->idx[0] = hlsl_reg.id;
             reg->idx_count = 1;
@@ -3597,7 +3597,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
         struct hlsl_reg hlsl_reg = hlsl_reg_from_deref(ctx, deref);

assert(hlsl_reg.allocated);
-        reg->type = VKD3D_SM4_RT_TEMP;
+        reg->type = VKD3DSPR_TEMP;
         reg->dim = VKD3D_SM4_DIMENSION_VEC4;
         if (swizzle_type)
             *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
@@ -3621,7 +3621,7 @@ static void sm4_register_from_node(struct sm4_register *reg, unsigned int *write
         enum vkd3d_sm4_swizzle_type *swizzle_type, const struct hlsl_ir_node *instr)
 {
     assert(instr->reg.allocated);
-    reg->type = VKD3D_SM4_RT_TEMP;
+    reg->type = VKD3DSPR_TEMP;
     reg->dim = VKD3D_SM4_DIMENSION_VEC4;
     *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
     reg->idx[0] = instr->reg.id;
@@ -3640,7 +3640,7 @@ static void sm4_src_from_constant_value(struct sm4_src_register *src,
         const struct hlsl_constant_value *value, unsigned int width, unsigned int map_writemask)
 {
     src->swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
-    src->reg.type = VKD3D_SM4_RT_IMMCONST;
+    src->reg.type = VKD3DSPR_IMMCONST;
     if (width == 1)
     {
         src->reg.dim = VKD3D_SM4_DIMENSION_SCALAR;
@@ -3679,7 +3679,22 @@ static void sm4_src_from_node(struct sm4_src_register *src,

static uint32_t sm4_encode_register(const struct sm4_register *reg)
 {
-    return (reg->type << VKD3D_SM4_REGISTER_TYPE_SHIFT)
+    uint32_t sm4_reg_type = ~0u;
+    unsigned int i;
+
+    /* Find sm4 register type from vkd3d_shader_register_type. */
+    for (i = 0; i < ARRAY_SIZE(register_type_table); ++i)
+    {
+        if (reg->type == register_type_table[i])
+        {
+            if (sm4_reg_type != ~0u)
+                ERR("Multiple maps for register_type %#x.\n", reg->type);
+            sm4_reg_type = i;
+        }
+    }
+    assert(sm4_reg_type != ~0u);
+
+    return (sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT)
             | (reg->idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT)
             | (reg->dim << VKD3D_SM4_DIMENSION_SHIFT);
 }
@@ -3687,7 +3702,7 @@ static uint32_t sm4_encode_register(const struct sm4_register *reg)
 static uint32_t sm4_register_order(const struct sm4_register *reg)
 {
     uint32_t order = 1;
-    if (reg->type == VKD3D_SM4_RT_IMMCONST)
+    if (reg->type == VKD3DSPR_IMMCONST)
         order += reg->dim == VKD3D_SM4_DIMENSION_VEC4 ? 4 : 1;
     order += reg->idx_count;
     if (reg->mod)
@@ -3750,7 +3765,7 @@ static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const st
         for (j = 0; j < instr->srcs[i].reg.idx_count; ++j)
             put_u32(buffer, instr->srcs[i].reg.idx[j]);

-        if (instr->srcs[i].reg.type == VKD3D_SM4_RT_IMMCONST)
+        if (instr->srcs[i].reg.type == VKD3DSPR_IMMCONST)
         {
             put_u32(buffer, instr->srcs[i].reg.immconst_uint[0]);
             if (instr->srcs[i].reg.dim == VKD3D_SM4_DIMENSION_VEC4)
@@ -3803,7 +3818,7 @@ static void write_sm4_dcl_constant_buffer(struct vkd3d_bytecode_buffer *buffer,
         .opcode = VKD3D_SM4_OP_DCL_CONSTANT_BUFFER,

.srcs[0].reg.dim = VKD3D_SM4_DIMENSION_VEC4,
-        .srcs[0].reg.type = VKD3D_SM4_RT_CONSTBUFFER,
+        .srcs[0].reg.type = VKD3DSPR_CONSTBUFFER,
         .srcs[0].reg.idx = {cbuffer->reg.id, (cbuffer->used_size + 3) / 4},
         .srcs[0].reg.idx_count = 2,
         .srcs[0].swizzle_type = VKD3D_SM4_SWIZZLE_VEC4,
@@ -3822,7 +3837,7 @@ static void write_sm4_dcl_samplers(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
     {
         .opcode = VKD3D_SM4_OP_DCL_SAMPLER,

-        .dsts[0].reg.type = VKD3D_SM4_RT_SAMPLER,
+        .dsts[0].reg.type = VKD3DSPR_SAMPLER,
         .dsts[0].reg.idx_count = 1,
         .dst_count = 1,
     };
@@ -3863,7 +3878,7 @@ static void write_sm4_dcl_textures(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b

instr = (struct sm4_instruction)
         {
-            .dsts[0].reg.type = uav ? VKD3D_SM5_RT_UAV : VKD3D_SM4_RT_RESOURCE,
+            .dsts[0].reg.type = uav ? VKD3DSPR_UAV : VKD3DSPR_RESOURCE,
             .dsts[0].reg.idx = {resource->id + i},
             .dsts[0].reg.idx_count = 1,
             .dst_count = 1,
@@ -3929,13 +3944,13 @@ static void write_sm4_dcl_semantic(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
     }
     else
     {
-        instr.dsts[0].reg.type = output ? VKD3D_SM4_RT_OUTPUT : VKD3D_SM4_RT_INPUT;
+        instr.dsts[0].reg.type = output ? VKD3DSPR_OUTPUT : VKD3DSPR_INPUT;
         instr.dsts[0].reg.idx[0] = var->regs[HLSL_REGSET_NUMERIC].id;
         instr.dsts[0].reg.idx_count = 1;
         instr.dsts[0].writemask = var->regs[HLSL_REGSET_NUMERIC].writemask;
     }

-    if (instr.dsts[0].reg.type == VKD3D_SM4_RT_DEPTHOUT)
+    if (instr.dsts[0].reg.type == VKD3DSPR_DEPTHOUT)
         instr.dsts[0].reg.dim = VKD3D_SM4_DIMENSION_SCALAR;

hlsl_sm4_usage_from_semantic(ctx, &var->semantic, output, &usage);
@@ -4067,7 +4082,7 @@ static void write_sm4_unary_op_with_two_destinations(struct vkd3d_bytecode_buffe
     assert(dst_idx < ARRAY_SIZE(instr.dsts));
     sm4_dst_from_node(&instr.dsts[dst_idx], dst);
     assert(1 - dst_idx >= 0);
-    instr.dsts[1 - dst_idx].reg.type = VKD3D_SM4_RT_NULL;
+    instr.dsts[1 - dst_idx].reg.type = VKD3DSPR_NULL;
     instr.dsts[1 - dst_idx].reg.dim = VKD3D_SM4_DIMENSION_NONE;
     instr.dsts[1 - dst_idx].reg.idx_count = 0;
     instr.dst_count = 2;
@@ -4127,7 +4142,7 @@ static void write_sm4_binary_op_with_two_destinations(struct vkd3d_bytecode_buff
     assert(dst_idx < ARRAY_SIZE(instr.dsts));
     sm4_dst_from_node(&instr.dsts[dst_idx], dst);
     assert(1 - dst_idx >= 0);
-    instr.dsts[1 - dst_idx].reg.type = VKD3D_SM4_RT_NULL;
+    instr.dsts[1 - dst_idx].reg.type = VKD3DSPR_NULL;
     instr.dsts[1 - dst_idx].reg.dim = VKD3D_SM4_DIMENSION_NONE;
     instr.dsts[1 - dst_idx].reg.idx_count = 0;
     instr.dst_count = 2;
@@ -4199,7 +4214,7 @@ static void write_sm4_ld(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buf

memset(&instr.srcs[2], 0, sizeof(instr.srcs[2]));
             instr.srcs[2].swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
-            reg->type = VKD3D_SM4_RT_IMMCONST;
+            reg->type = VKD3DSPR_IMMCONST;
             reg->dim = VKD3D_SM4_DIMENSION_SCALAR;
             reg->immconst_uint[0] = index->value.u[0].u;
         }
@@ -4318,7 +4333,7 @@ static void write_sm4_cast_from_bool(struct hlsl_ctx *ctx,

sm4_src_from_node(&instr.srcs[0], arg, instr.dsts[0].writemask);
     instr.srcs[1].swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
-    instr.srcs[1].reg.type = VKD3D_SM4_RT_IMMCONST;
+    instr.srcs[1].reg.type = VKD3DSPR_IMMCONST;
     instr.srcs[1].reg.dim = VKD3D_SM4_DIMENSION_SCALAR;
     instr.srcs[1].reg.immconst_uint[0] = mask;
     instr.src_count = 2;

[PATCH v4 03/10] vkd3d-shader/tpf: Allow passing NULL register type on hlsl_sm4_register_from_semantic().

[Francisco Casas]

From: Francisco Casas

---
 libs/vkd3d-shader/tpf.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 0071989e..2264afb8 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -2555,7 +2555,8 @@ bool hlsl_sm4_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_sem
                 && output == register_table[i].output
                 && ctx->profile->type == register_table[i].shader_type)
         {
-            *type = register_table[i].type;
+            if (type)
+                *type = register_table[i].type;
             if (swizzle_type)
                 *swizzle_type = register_table[i].swizzle_type;
             *has_idx = register_table[i].has_idx;
@@ -2652,7 +2653,6 @@ static void write_sm4_signature(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc,
     LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
     {
         unsigned int width = (1u << var->data_type->dimx) - 1, use_mask;
-        enum vkd3d_shader_register_type type;
         uint32_t usage_idx, reg_idx;
         D3D_NAME usage;
         bool has_idx;
@@ -2666,14 +2666,13 @@ static void write_sm4_signature(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc,
             continue;
         usage_idx = var->semantic.index;

-        if (hlsl_sm4_register_from_semantic(ctx, &var->semantic, output, &type, NULL, &has_idx))
+        if (hlsl_sm4_register_from_semantic(ctx, &var->semantic, output, NULL, NULL, &has_idx))
         {
             reg_idx = has_idx ? var->semantic.index : ~0u;
         }
         else
         {
             assert(var->regs[HLSL_REGSET_NUMERIC].allocated);
-            type = VKD3D_SM4_RT_INPUT;
             reg_idx = var->regs[HLSL_REGSET_NUMERIC].id;
         }

[PATCH v4 04/10] vkd3d-shader/tpf: Use struct vkd3d_shader_register_index in sm4_register.idx[].

[Francisco Casas]

From: Francisco Casas

---
 libs/vkd3d-shader/tpf.c | 55 ++++++++++++++++++++++++-----------------
 1 file changed, 32 insertions(+), 23 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 2264afb8..d5937beb 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -3431,7 +3431,7 @@ static uint32_t sm4_encode_instruction_modifier(const struct sm4_instruction_mod
 struct sm4_register
 {
     enum vkd3d_shader_register_type type;
-    uint32_t idx[2];
+    struct vkd3d_shader_register_index idx[2];
     unsigned int idx_count;
     enum vkd3d_sm4_dimension dim;
     uint32_t immconst_uint[4];
@@ -3483,8 +3483,8 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
-            reg->idx[0] = var->regs[HLSL_REGSET_TEXTURES].id;
-            reg->idx[0] += hlsl_offset_from_deref_safe(ctx, deref);
+            reg->idx[0].offset = var->regs[HLSL_REGSET_TEXTURES].id;
+            reg->idx[0].offset += hlsl_offset_from_deref_safe(ctx, deref);
             assert(regset == HLSL_REGSET_TEXTURES);
             reg->idx_count = 1;
             *writemask = VKD3DSP_WRITEMASK_ALL;
@@ -3495,8 +3495,8 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
-            reg->idx[0] = var->regs[HLSL_REGSET_UAVS].id;
-            reg->idx[0] += hlsl_offset_from_deref_safe(ctx, deref);
+            reg->idx[0].offset = var->regs[HLSL_REGSET_UAVS].id;
+            reg->idx[0].offset += hlsl_offset_from_deref_safe(ctx, deref);
             assert(regset == HLSL_REGSET_UAVS);
             reg->idx_count = 1;
             *writemask = VKD3DSP_WRITEMASK_ALL;
@@ -3507,8 +3507,8 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             reg->dim = VKD3D_SM4_DIMENSION_NONE;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
-            reg->idx[0] = var->regs[HLSL_REGSET_SAMPLERS].id;
-            reg->idx[0] += hlsl_offset_from_deref_safe(ctx, deref);
+            reg->idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].id;
+            reg->idx[0].offset += hlsl_offset_from_deref_safe(ctx, deref);
             assert(regset == HLSL_REGSET_SAMPLERS);
             reg->idx_count = 1;
             *writemask = VKD3DSP_WRITEMASK_ALL;
@@ -3522,8 +3522,8 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
-            reg->idx[0] = var->buffer->reg.id;
-            reg->idx[1] = offset / 4;
+            reg->idx[0].offset = var->buffer->reg.id;
+            reg->idx[1].offset = offset / 4;
             reg->idx_count = 2;
             *writemask = ((1u << data_type->dimx) - 1) << (offset & 3);
         }
@@ -3538,7 +3538,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r

if (has_idx)
             {
-                reg->idx[0] = var->semantic.index + offset / 4;
+                reg->idx[0].offset = var->semantic.index + offset / 4;
                 reg->idx_count = 1;
             }

@@ -3554,7 +3554,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
-            reg->idx[0] = hlsl_reg.id;
+            reg->idx[0].offset = hlsl_reg.id;
             reg->idx_count = 1;
             *writemask = hlsl_reg.writemask;
         }
@@ -3569,7 +3569,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r

if (has_idx)
             {
-                reg->idx[0] = var->semantic.index + offset / 4;
+                reg->idx[0].offset = var->semantic.index + offset / 4;
                 reg->idx_count = 1;
             }

@@ -3586,7 +3586,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
             assert(hlsl_reg.allocated);
             reg->type = VKD3DSPR_OUTPUT;
             reg->dim = VKD3D_SM4_DIMENSION_VEC4;
-            reg->idx[0] = hlsl_reg.id;
+            reg->idx[0].offset = hlsl_reg.id;
             reg->idx_count = 1;
             *writemask = hlsl_reg.writemask;
         }
@@ -3600,7 +3600,7 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
         reg->dim = VKD3D_SM4_DIMENSION_VEC4;
         if (swizzle_type)
             *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
-        reg->idx[0] = hlsl_reg.id;
+        reg->idx[0].offset = hlsl_reg.id;
         reg->idx_count = 1;
         *writemask = hlsl_reg.writemask;
     }
@@ -3623,7 +3623,7 @@ static void sm4_register_from_node(struct sm4_register *reg, unsigned int *write
     reg->type = VKD3DSPR_TEMP;
     reg->dim = VKD3D_SM4_DIMENSION_VEC4;
     *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
-    reg->idx[0] = instr->reg.id;
+    reg->idx[0].offset = instr->reg.id;
     reg->idx_count = 1;
     *writemask = instr->reg.writemask;
 }
@@ -3745,7 +3745,10 @@ static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const st
         put_u32(buffer, token);

for (j = 0; j < instr->dsts[i].reg.idx_count; ++j)
-            put_u32(buffer, instr->dsts[i].reg.idx[j]);
+        {
+            put_u32(buffer, instr->dsts[i].reg.idx[j].offset);
+            assert(!instr->dsts[i].reg.idx[j].rel_addr);
+        }
     }

for (i = 0; i < instr->src_count; ++i)
@@ -3762,7 +3765,10 @@ static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const st
                     | VKD3D_SM4_EXTENDED_OPERAND_MODIFIER);

for (j = 0; j < instr->srcs[i].reg.idx_count; ++j)
-            put_u32(buffer, instr->srcs[i].reg.idx[j]);
+        {
+            put_u32(buffer, instr->srcs[i].reg.idx[j].offset);
+            assert(!instr->srcs[i].reg.idx[j].rel_addr);
+        }

if (instr->srcs[i].reg.type == VKD3DSPR_IMMCONST)
         {
@@ -3818,7 +3824,8 @@ static void write_sm4_dcl_constant_buffer(struct vkd3d_bytecode_buffer *buffer,

.srcs[0].reg.dim = VKD3D_SM4_DIMENSION_VEC4,
         .srcs[0].reg.type = VKD3DSPR_CONSTBUFFER,
-        .srcs[0].reg.idx = {cbuffer->reg.id, (cbuffer->used_size + 3) / 4},
+        .srcs[0].reg.idx[0].offset = cbuffer->reg.id,
+        .srcs[0].reg.idx[1].offset = (cbuffer->used_size + 3) / 4,
         .srcs[0].reg.idx_count = 2,
         .srcs[0].swizzle_type = VKD3D_SM4_SWIZZLE_VEC4,
         .srcs[0].swizzle = HLSL_SWIZZLE(X, Y, Z, W),
@@ -3853,7 +3860,7 @@ static void write_sm4_dcl_samplers(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
         if (resource->var && !resource->var->objects_usage[HLSL_REGSET_SAMPLERS][i].used)
             continue;

-        instr.dsts[0].reg.idx[0] = resource->id + i;
+        instr.dsts[0].reg.idx[0].offset = resource->id + i;
         write_sm4_instruction(buffer, &instr);
     }
 }
@@ -3878,7 +3885,7 @@ static void write_sm4_dcl_textures(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
         instr = (struct sm4_instruction)
         {
             .dsts[0].reg.type = uav ? VKD3DSPR_UAV : VKD3DSPR_RESOURCE,
-            .dsts[0].reg.idx = {resource->id + i},
+            .dsts[0].reg.idx[0].offset = resource->id + i,
             .dsts[0].reg.idx_count = 1,
             .dst_count = 1,

@@ -3932,7 +3939,7 @@ static void write_sm4_dcl_semantic(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
     {
         if (has_idx)
         {
-            instr.dsts[0].reg.idx[0] = var->semantic.index;
+            instr.dsts[0].reg.idx[0].offset = var->semantic.index;
             instr.dsts[0].reg.idx_count = 1;
         }
         else
@@ -3944,7 +3951,7 @@ static void write_sm4_dcl_semantic(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
     else
     {
         instr.dsts[0].reg.type = output ? VKD3DSPR_OUTPUT : VKD3DSPR_INPUT;
-        instr.dsts[0].reg.idx[0] = var->regs[HLSL_REGSET_NUMERIC].id;
+        instr.dsts[0].reg.idx[0].offset = var->regs[HLSL_REGSET_NUMERIC].id;
         instr.dsts[0].reg.idx_count = 1;
         instr.dsts[0].writemask = var->regs[HLSL_REGSET_NUMERIC].writemask;
     }
@@ -4034,7 +4041,9 @@ static void write_sm4_dcl_thread_group(struct vkd3d_bytecode_buffer *buffer, con
     {
         .opcode = VKD3D_SM5_OP_DCL_THREAD_GROUP,

-        .idx = {thread_count[0], thread_count[1], thread_count[2]},
+        .idx[0] = thread_count[0],
+        .idx[1] = thread_count[1],
+        .idx[2] = thread_count[2],
         .idx_count = 3,
     };

[PATCH v4 05/10] vkd3d-shader/tpf: Pass ctx to sm4_encode_register().

[Francisco Casas]

From: Francisco Casas

This is required so we can access lookup tables for register type
information tables later.
---
 libs/vkd3d-shader/tpf.c | 236 ++++++++++++++++++++--------------------
 1 file changed, 121 insertions(+), 115 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index d5937beb..77cadb94 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -3676,7 +3676,7 @@ static void sm4_src_from_node(struct sm4_src_register *src,
         src->swizzle = hlsl_map_swizzle(hlsl_swizzle_from_writemask(writemask), map_writemask);
 }

-static uint32_t sm4_encode_register(const struct sm4_register *reg)
+static uint32_t sm4_encode_register(struct hlsl_ctx *ctx, const struct sm4_register *reg)
 {
     uint32_t sm4_reg_type = ~0u;
     unsigned int i;
@@ -3709,7 +3709,8 @@ static uint32_t sm4_register_order(const struct sm4_register *reg)
     return order;
 }

-static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const struct sm4_instruction *instr)
+static void write_sm4_instruction(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        const struct sm4_instruction *instr)
 {
     uint32_t token = instr->opcode;
     unsigned int size = 1, i, j;
@@ -3739,7 +3740,7 @@ static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const st

for (i = 0; i < instr->dst_count; ++i)
     {
-        token = sm4_encode_register(&instr->dsts[i].reg);
+        token = sm4_encode_register(ctx, &instr->dsts[i].reg);
         if (instr->dsts[i].reg.dim == VKD3D_SM4_DIMENSION_VEC4)
             token |= instr->dsts[i].writemask << VKD3D_SM4_WRITEMASK_SHIFT;
         put_u32(buffer, token);
@@ -3753,7 +3754,7 @@ static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const st

for (i = 0; i < instr->src_count; ++i)
     {
-        token = sm4_encode_register(&instr->srcs[i].reg);
+        token = sm4_encode_register(ctx, &instr->srcs[i].reg);
         token |= (uint32_t)instr->srcs[i].swizzle_type << VKD3D_SM4_SWIZZLE_TYPE_SHIFT;
         token |= instr->srcs[i].swizzle << VKD3D_SM4_SWIZZLE_SHIFT;
         if (instr->srcs[i].reg.mod)
@@ -3816,7 +3817,8 @@ static bool encode_texel_offset_as_aoffimmi(struct sm4_instruction *instr,
     return true;
 }

-static void write_sm4_dcl_constant_buffer(struct vkd3d_bytecode_buffer *buffer, const struct hlsl_buffer *cbuffer)
+static void write_sm4_dcl_constant_buffer(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        const struct hlsl_buffer *cbuffer)
 {
     const struct sm4_instruction instr =
     {
@@ -3831,7 +3833,7 @@ static void write_sm4_dcl_constant_buffer(struct vkd3d_bytecode_buffer *buffer,
         .srcs[0].swizzle = HLSL_SWIZZLE(X, Y, Z, W),
         .src_count = 1,
     };
-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_dcl_samplers(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
@@ -3861,7 +3863,7 @@ static void write_sm4_dcl_samplers(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
             continue;

instr.dsts[0].reg.idx[0].offset = resource->id + i;
-        write_sm4_instruction(buffer, &instr);
+        write_sm4_instruction(ctx, buffer, &instr);
     }
 }

@@ -3918,7 +3920,7 @@ static void write_sm4_dcl_textures(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
             instr.opcode |= component_type->sample_count << VKD3D_SM4_RESOURCE_SAMPLE_COUNT_SHIFT;
         }

-        write_sm4_instruction(buffer, &instr);
+        write_sm4_instruction(ctx, buffer, &instr);
     }
 }

@@ -4019,10 +4021,10 @@ static void write_sm4_dcl_semantic(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
             break;
     }

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_dcl_temps(struct vkd3d_bytecode_buffer *buffer, uint32_t temp_count)
+static void write_sm4_dcl_temps(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer, uint32_t temp_count)
 {
     struct sm4_instruction instr =
     {
@@ -4032,10 +4034,11 @@ static void write_sm4_dcl_temps(struct vkd3d_bytecode_buffer *buffer, uint32_t t
         .idx_count = 1,
     };

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_dcl_thread_group(struct vkd3d_bytecode_buffer *buffer, const uint32_t thread_count[3])
+static void write_sm4_dcl_thread_group(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        const uint32_t thread_count[3])
 {
     struct sm4_instruction instr =
     {
@@ -4047,21 +4050,22 @@ static void write_sm4_dcl_thread_group(struct vkd3d_bytecode_buffer *buffer, con
         .idx_count = 3,
     };

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_ret(struct vkd3d_bytecode_buffer *buffer)
+static void write_sm4_ret(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer)
 {
     struct sm4_instruction instr =
     {
         .opcode = VKD3D_SM4_OP_RET,
     };

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_unary_op(struct vkd3d_bytecode_buffer *buffer, enum vkd3d_sm4_opcode opcode,
-        const struct hlsl_ir_node *dst, const struct hlsl_ir_node *src, unsigned int src_mod)
+static void write_sm4_unary_op(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst, const struct hlsl_ir_node *src,
+        unsigned int src_mod)
 {
     struct sm4_instruction instr;

@@ -4075,12 +4079,12 @@ static void write_sm4_unary_op(struct vkd3d_bytecode_buffer *buffer, enum vkd3d_
     instr.srcs[0].reg.mod = src_mod;
     instr.src_count = 1;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_unary_op_with_two_destinations(struct vkd3d_bytecode_buffer *buffer,
-        enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst, unsigned dst_idx,
-        const struct hlsl_ir_node *src)
+static void write_sm4_unary_op_with_two_destinations(struct hlsl_ctx *ctx,
+        struct vkd3d_bytecode_buffer *buffer, enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst,
+        unsigned dst_idx, const struct hlsl_ir_node *src)
 {
     struct sm4_instruction instr;

@@ -4098,11 +4102,12 @@ static void write_sm4_unary_op_with_two_destinations(struct vkd3d_bytecode_buffe
     sm4_src_from_node(&instr.srcs[0], src, instr.dsts[dst_idx].writemask);
     instr.src_count = 1;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_binary_op(struct vkd3d_bytecode_buffer *buffer, enum vkd3d_sm4_opcode opcode,
-        const struct hlsl_ir_node *dst, const struct hlsl_ir_node *src1, const struct hlsl_ir_node *src2)
+static void write_sm4_binary_op(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst, const struct hlsl_ir_node *src1,
+        const struct hlsl_ir_node *src2)
 {
     struct sm4_instruction instr;

@@ -4116,12 +4121,13 @@ static void write_sm4_binary_op(struct vkd3d_bytecode_buffer *buffer, enum vkd3d
     sm4_src_from_node(&instr.srcs[1], src2, instr.dsts[0].writemask);
     instr.src_count = 2;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

/* dp# instructions don't map the swizzle. */
-static void write_sm4_binary_op_dot(struct vkd3d_bytecode_buffer *buffer, enum vkd3d_sm4_opcode opcode,
-        const struct hlsl_ir_node *dst, const struct hlsl_ir_node *src1, const struct hlsl_ir_node *src2)
+static void write_sm4_binary_op_dot(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst, const struct hlsl_ir_node *src1,
+        const struct hlsl_ir_node *src2)
 {
     struct sm4_instruction instr;

@@ -4135,12 +4141,12 @@ static void write_sm4_binary_op_dot(struct vkd3d_bytecode_buffer *buffer, enum v
     sm4_src_from_node(&instr.srcs[1], src2, VKD3DSP_WRITEMASK_ALL);
     instr.src_count = 2;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_binary_op_with_two_destinations(struct vkd3d_bytecode_buffer *buffer,
-        enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst, unsigned dst_idx,
-        const struct hlsl_ir_node *src1, const struct hlsl_ir_node *src2)
+static void write_sm4_binary_op_with_two_destinations(struct hlsl_ctx *ctx,
+        struct vkd3d_bytecode_buffer *buffer, enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst,
+        unsigned dst_idx, const struct hlsl_ir_node *src1, const struct hlsl_ir_node *src2)
 {
     struct sm4_instruction instr;

@@ -4159,7 +4165,7 @@ static void write_sm4_binary_op_with_two_destinations(struct vkd3d_bytecode_buff
     sm4_src_from_node(&instr.srcs[1], src2, instr.dsts[dst_idx].writemask);
     instr.src_count = 2;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_ld(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
@@ -4238,7 +4244,7 @@ static void write_sm4_ld(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buf
         ++instr.src_count;
     }

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_sample(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
@@ -4319,7 +4325,7 @@ static void write_sm4_sample(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer
         ++instr.src_count;
     }

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static bool type_is_float(const struct hlsl_type *type)
@@ -4346,11 +4352,11 @@ static void write_sm4_cast_from_bool(struct hlsl_ctx *ctx,
     instr.srcs[1].reg.immconst_uint[0] = mask;
     instr.src_count = 2;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

-static void write_sm4_cast(struct hlsl_ctx *ctx,
-        struct vkd3d_bytecode_buffer *buffer, const struct hlsl_ir_expr *expr)
+static void write_sm4_cast(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        const struct hlsl_ir_expr *expr)
 {
     static const union
     {
@@ -4372,15 +4378,15 @@ static void write_sm4_cast(struct hlsl_ctx *ctx,
             {
                 case HLSL_TYPE_HALF:
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
                     break;

case HLSL_TYPE_INT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_ITOF, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_ITOF, &expr->node, arg1, 0);
                     break;

case HLSL_TYPE_UINT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_UTOF, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_UTOF, &expr->node, arg1, 0);
                     break;

case HLSL_TYPE_BOOL:
@@ -4401,12 +4407,12 @@ static void write_sm4_cast(struct hlsl_ctx *ctx,
             {
                 case HLSL_TYPE_HALF:
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_FTOI, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_FTOI, &expr->node, arg1, 0);
                     break;

case HLSL_TYPE_INT:
                 case HLSL_TYPE_UINT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
                     break;

case HLSL_TYPE_BOOL:
@@ -4427,12 +4433,12 @@ static void write_sm4_cast(struct hlsl_ctx *ctx,
             {
                 case HLSL_TYPE_HALF:
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_FTOU, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_FTOU, &expr->node, arg1, 0);
                     break;

case HLSL_TYPE_INT:
                 case HLSL_TYPE_UINT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
                     break;

case HLSL_TYPE_BOOL:
@@ -4474,7 +4480,7 @@ static void write_sm4_store_uav_typed(struct hlsl_ctx *ctx, struct vkd3d_bytecod
     sm4_src_from_node(&instr.srcs[1], value, VKD3DSP_WRITEMASK_ALL);
     instr.src_count = 2;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_expr(struct hlsl_ctx *ctx,
@@ -4496,7 +4502,7 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, VKD3D_SM4_REGISTER_MODIFIER_ABS);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, VKD3D_SM4_REGISTER_MODIFIER_ABS);
                     break;

default:
@@ -4506,7 +4512,7 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,

case HLSL_OP1_BIT_NOT:
             assert(type_is_integer(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_NOT, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_NOT, &expr->node, arg1, 0);
             break;

case HLSL_OP1_CAST:
@@ -4515,74 +4521,74 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,

case HLSL_OP1_COS:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op_with_two_destinations(buffer, VKD3D_SM4_OP_SINCOS, &expr->node, 1, arg1);
+            write_sm4_unary_op_with_two_destinations(ctx, buffer, VKD3D_SM4_OP_SINCOS, &expr->node, 1, arg1);
             break;

case HLSL_OP1_DSX:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_DERIV_RTX, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_DERIV_RTX, &expr->node, arg1, 0);
             break;

case HLSL_OP1_DSX_COARSE:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM5_OP_DERIV_RTX_COARSE, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM5_OP_DERIV_RTX_COARSE, &expr->node, arg1, 0);
             break;

case HLSL_OP1_DSX_FINE:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM5_OP_DERIV_RTX_FINE, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM5_OP_DERIV_RTX_FINE, &expr->node, arg1, 0);
             break;

case HLSL_OP1_DSY:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_DERIV_RTY, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_DERIV_RTY, &expr->node, arg1, 0);
             break;

case HLSL_OP1_DSY_COARSE:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM5_OP_DERIV_RTY_COARSE, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM5_OP_DERIV_RTY_COARSE, &expr->node, arg1, 0);
             break;

case HLSL_OP1_DSY_FINE:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM5_OP_DERIV_RTY_FINE, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM5_OP_DERIV_RTY_FINE, &expr->node, arg1, 0);
             break;

case HLSL_OP1_EXP2:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_EXP, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_EXP, &expr->node, arg1, 0);
             break;

case HLSL_OP1_FLOOR:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_ROUND_NI, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_ROUND_NI, &expr->node, arg1, 0);
             break;

case HLSL_OP1_FRACT:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_FRC, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_FRC, &expr->node, arg1, 0);
             break;

case HLSL_OP1_LOG2:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_LOG, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_LOG, &expr->node, arg1, 0);
             break;

case HLSL_OP1_LOGIC_NOT:
             assert(dst_type->base_type == HLSL_TYPE_BOOL);
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_NOT, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_NOT, &expr->node, arg1, 0);
             break;

case HLSL_OP1_NEG:
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, VKD3D_SM4_REGISTER_MODIFIER_NEGATE);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, VKD3D_SM4_REGISTER_MODIFIER_NEGATE);
                     break;

case HLSL_TYPE_INT:
                 case HLSL_TYPE_UINT:
-                    write_sm4_unary_op(buffer, VKD3D_SM4_OP_INEG, &expr->node, arg1, 0);
+                    write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_INEG, &expr->node, arg1, 0);
                     break;

default:
@@ -4591,51 +4597,51 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             break;

case HLSL_OP1_REINTERPRET:
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_MOV, &expr->node, arg1, 0);
             break;

case HLSL_OP1_ROUND:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_ROUND_NE, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_ROUND_NE, &expr->node, arg1, 0);
             break;

case HLSL_OP1_RSQ:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_RSQ, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_RSQ, &expr->node, arg1, 0);
             break;

case HLSL_OP1_SAT:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_MOV
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_MOV
                     | (VKD3D_SM4_INSTRUCTION_FLAG_SATURATE << VKD3D_SM4_INSTRUCTION_FLAGS_SHIFT),
                     &expr->node, arg1, 0);
             break;

case HLSL_OP1_SIN:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op_with_two_destinations(buffer, VKD3D_SM4_OP_SINCOS, &expr->node, 0, arg1);
+            write_sm4_unary_op_with_two_destinations(ctx, buffer, VKD3D_SM4_OP_SINCOS, &expr->node, 0, arg1);
             break;

case HLSL_OP1_SQRT:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_SQRT, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_SQRT, &expr->node, arg1, 0);
             break;

case HLSL_OP1_TRUNC:
             assert(type_is_float(dst_type));
-            write_sm4_unary_op(buffer, VKD3D_SM4_OP_ROUND_Z, &expr->node, arg1, 0);
+            write_sm4_unary_op(ctx, buffer, VKD3D_SM4_OP_ROUND_Z, &expr->node, arg1, 0);
             break;

case HLSL_OP2_ADD:
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_ADD, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_ADD, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_INT:
                 case HLSL_TYPE_UINT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_IADD, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_IADD, &expr->node, arg1, arg2);
                     break;

default:
@@ -4645,28 +4651,28 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,

case HLSL_OP2_BIT_AND:
             assert(type_is_integer(dst_type));
-            write_sm4_binary_op(buffer, VKD3D_SM4_OP_AND, &expr->node, arg1, arg2);
+            write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_AND, &expr->node, arg1, arg2);
             break;

case HLSL_OP2_BIT_OR:
             assert(type_is_integer(dst_type));
-            write_sm4_binary_op(buffer, VKD3D_SM4_OP_OR, &expr->node, arg1, arg2);
+            write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_OR, &expr->node, arg1, arg2);
             break;

case HLSL_OP2_BIT_XOR:
             assert(type_is_integer(dst_type));
-            write_sm4_binary_op(buffer, VKD3D_SM4_OP_XOR, &expr->node, arg1, arg2);
+            write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_XOR, &expr->node, arg1, arg2);
             break;

case HLSL_OP2_DIV:
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_DIV, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_DIV, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_UINT:
-                    write_sm4_binary_op_with_two_destinations(buffer, VKD3D_SM4_OP_UDIV, &expr->node, 0, arg1, arg2);
+                    write_sm4_binary_op_with_two_destinations(ctx, buffer, VKD3D_SM4_OP_UDIV, &expr->node, 0, arg1, arg2);
                     break;

default:
@@ -4681,15 +4687,15 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
                     switch (arg1->data_type->dimx)
                     {
                         case 4:
-                            write_sm4_binary_op_dot(buffer, VKD3D_SM4_OP_DP4, &expr->node, arg1, arg2);
+                            write_sm4_binary_op_dot(ctx, buffer, VKD3D_SM4_OP_DP4, &expr->node, arg1, arg2);
                             break;

case 3:
-                            write_sm4_binary_op_dot(buffer, VKD3D_SM4_OP_DP3, &expr->node, arg1, arg2);
+                            write_sm4_binary_op_dot(ctx, buffer, VKD3D_SM4_OP_DP3, &expr->node, arg1, arg2);
                             break;

case 2:
-                            write_sm4_binary_op_dot(buffer, VKD3D_SM4_OP_DP2, &expr->node, arg1, arg2);
+                            write_sm4_binary_op_dot(ctx, buffer, VKD3D_SM4_OP_DP2, &expr->node, arg1, arg2);
                             break;

case 1:
@@ -4712,13 +4718,13 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (src_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_EQ, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_EQ, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_BOOL:
                 case HLSL_TYPE_INT:
                 case HLSL_TYPE_UINT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_IEQ, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_IEQ, &expr->node, arg1, arg2);
                     break;

default:
@@ -4738,16 +4744,16 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (src_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_GE, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_GE, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_INT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_IGE, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_IGE, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_BOOL:
                 case HLSL_TYPE_UINT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_UGE, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_UGE, &expr->node, arg1, arg2);
                     break;

default:
@@ -4767,16 +4773,16 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (src_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_LT, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_LT, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_INT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_ILT, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_ILT, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_BOOL:
                 case HLSL_TYPE_UINT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_ULT, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_ULT, &expr->node, arg1, arg2);
                     break;

default:
@@ -4789,33 +4795,33 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,

case HLSL_OP2_LOGIC_AND:
             assert(dst_type->base_type == HLSL_TYPE_BOOL);
-            write_sm4_binary_op(buffer, VKD3D_SM4_OP_AND, &expr->node, arg1, arg2);
+            write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_AND, &expr->node, arg1, arg2);
             break;

case HLSL_OP2_LOGIC_OR:
             assert(dst_type->base_type == HLSL_TYPE_BOOL);
-            write_sm4_binary_op(buffer, VKD3D_SM4_OP_OR, &expr->node, arg1, arg2);
+            write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_OR, &expr->node, arg1, arg2);
             break;

case HLSL_OP2_LSHIFT:
             assert(type_is_integer(dst_type));
             assert(dst_type->base_type != HLSL_TYPE_BOOL);
-            write_sm4_binary_op(buffer, VKD3D_SM4_OP_ISHL, &expr->node, arg1, arg2);
+            write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_ISHL, &expr->node, arg1, arg2);
             break;

case HLSL_OP2_MAX:
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_MAX, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_MAX, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_INT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_IMAX, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_IMAX, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_UINT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_UMAX, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_UMAX, &expr->node, arg1, arg2);
                     break;

default:
@@ -4827,15 +4833,15 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_MIN, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_MIN, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_INT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_IMIN, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_IMIN, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_UINT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_UMIN, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_UMIN, &expr->node, arg1, arg2);
                     break;

default:
@@ -4847,7 +4853,7 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_UINT:
-                    write_sm4_binary_op_with_two_destinations(buffer, VKD3D_SM4_OP_UDIV, &expr->node, 1, arg1, arg2);
+                    write_sm4_binary_op_with_two_destinations(ctx, buffer, VKD3D_SM4_OP_UDIV, &expr->node, 1, arg1, arg2);
                     break;

default:
@@ -4859,14 +4865,14 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (dst_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_MUL, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_MUL, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_INT:
                 case HLSL_TYPE_UINT:
                     /* Using IMUL instead of UMUL because we're taking the low
                      * bits, and the native compiler generates IMUL. */
-                    write_sm4_binary_op_with_two_destinations(buffer, VKD3D_SM4_OP_IMUL, &expr->node, 1, arg1, arg2);
+                    write_sm4_binary_op_with_two_destinations(ctx, buffer, VKD3D_SM4_OP_IMUL, &expr->node, 1, arg1, arg2);
                     break;

default:
@@ -4883,13 +4889,13 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
             switch (src_type->base_type)
             {
                 case HLSL_TYPE_FLOAT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_NE, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_NE, &expr->node, arg1, arg2);
                     break;

case HLSL_TYPE_BOOL:
                 case HLSL_TYPE_INT:
                 case HLSL_TYPE_UINT:
-                    write_sm4_binary_op(buffer, VKD3D_SM4_OP_INE, &expr->node, arg1, arg2);
+                    write_sm4_binary_op(ctx, buffer, VKD3D_SM4_OP_INE, &expr->node, arg1, arg2);
                     break;

default:
@@ -4903,7 +4909,7 @@ static void write_sm4_expr(struct hlsl_ctx *ctx,
         case HLSL_OP2_RSHIFT:
             assert(type_is_integer(dst_type));
             assert(dst_type->base_type != HLSL_TYPE_BOOL);
-            write_sm4_binary_op(buffer, dst_type->base_type == HLSL_TYPE_INT ? VKD3D_SM4_OP_ISHR : VKD3D_SM4_OP_USHR,
+            write_sm4_binary_op(ctx, buffer, dst_type->base_type == HLSL_TYPE_INT ? VKD3D_SM4_OP_ISHR : VKD3D_SM4_OP_USHR,
                     &expr->node, arg1, arg2);
             break;

@@ -4925,7 +4931,7 @@ static void write_sm4_if(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buf
     assert(iff->condition.node->data_type->dimx == 1);

sm4_src_from_node(&instr.srcs[0], iff->condition.node, VKD3DSP_WRITEMASK_ALL);
-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);

write_sm4_block(ctx, buffer, &iff->then_block);

@@ -4933,14 +4939,14 @@ static void write_sm4_if(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buf
     {
         instr.opcode = VKD3D_SM4_OP_ELSE;
         instr.src_count = 0;
-        write_sm4_instruction(buffer, &instr);
+        write_sm4_instruction(ctx, buffer, &instr);

write_sm4_block(ctx, buffer, &iff->else_block);
     }

instr.opcode = VKD3D_SM4_OP_ENDIF;
     instr.src_count = 0;
-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_jump(struct hlsl_ctx *ctx,
@@ -4972,7 +4978,7 @@ static void write_sm4_jump(struct hlsl_ctx *ctx,
             return;
     }

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

/* Does this variable's data come directly from the API user, rather than being
@@ -5023,7 +5029,7 @@ static void write_sm4_load(struct hlsl_ctx *ctx,
         instr.src_count = 1;
     }

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_loop(struct hlsl_ctx *ctx,
@@ -5034,12 +5040,12 @@ static void write_sm4_loop(struct hlsl_ctx *ctx,
         .opcode = VKD3D_SM4_OP_LOOP,
     };

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);

write_sm4_block(ctx, buffer, &loop->body);

instr.opcode = VKD3D_SM4_OP_ENDLOOP;
-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_gather(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
@@ -5081,7 +5087,7 @@ static void write_sm4_gather(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer
     src->swizzle_type = VKD3D_SM4_SWIZZLE_SCALAR;
     src->swizzle = swizzle;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_resource_load(struct hlsl_ctx *ctx,
@@ -5180,7 +5186,7 @@ static void write_sm4_store(struct hlsl_ctx *ctx,
     sm4_src_from_node(&instr.srcs[0], rhs, instr.dsts[0].writemask);
     instr.src_count = 1;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_swizzle(struct hlsl_ctx *ctx,
@@ -5200,7 +5206,7 @@ static void write_sm4_swizzle(struct hlsl_ctx *ctx,
             swizzle->swizzle, swizzle->node.data_type->dimx), instr.dsts[0].writemask);
     instr.src_count = 1;

-    write_sm4_instruction(buffer, &instr);
+    write_sm4_instruction(ctx, buffer, &instr);
 }

static void write_sm4_block(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
@@ -5312,7 +5318,7 @@ static void write_sm4_shdr(struct hlsl_ctx *ctx,
     LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
     {
         if (cbuffer->reg.allocated)
-            write_sm4_dcl_constant_buffer(&buffer, cbuffer);
+            write_sm4_dcl_constant_buffer(ctx, &buffer, cbuffer);
     }

for (i = 0; i < extern_resources_count; ++i)
@@ -5334,14 +5340,14 @@ static void write_sm4_shdr(struct hlsl_ctx *ctx,
     }

if (profile->type == VKD3D_SHADER_TYPE_COMPUTE)
-        write_sm4_dcl_thread_group(&buffer, ctx->thread_count);
+        write_sm4_dcl_thread_group(ctx, &buffer, ctx->thread_count);

if (ctx->temp_count)
-        write_sm4_dcl_temps(&buffer, ctx->temp_count);
+        write_sm4_dcl_temps(ctx, &buffer, ctx->temp_count);

write_sm4_block(ctx, &buffer, &entry_func->body);

-    write_sm4_ret(&buffer);
+    write_sm4_ret(ctx, &buffer);

set_u32(&buffer, token_count_position, bytecode_get_size(&buffer) / sizeof(uint32_t));

[PATCH v4 06/10] vkd3d-shader/tpf: Make register_type_table an array of structs with lookup tables.

[Francisco Casas]

From: Francisco Casas

---
 libs/vkd3d-shader/hlsl.c                 |  11 ++
 libs/vkd3d-shader/hlsl.h                 |   6 +
 libs/vkd3d-shader/tpf.c                  | 168 +++++++++++++++--------
 libs/vkd3d-shader/vkd3d_shader_private.h |   2 +
 4 files changed, 128 insertions(+), 59 deletions(-)

diff --git a/libs/vkd3d-shader/hlsl.c b/libs/vkd3d-shader/hlsl.c
index 369af86b..47c6f646 100644
--- a/libs/vkd3d-shader/hlsl.c
+++ b/libs/vkd3d-shader/hlsl.c
@@ -3346,6 +3346,16 @@ static bool hlsl_ctx_init(struct hlsl_ctx *ctx, const char *source_name,
         return false;
     ctx->cur_buffer = ctx->globals_buffer;

+    if (ctx->profile->major_version >= 4)
+    {
+        if (!(ctx->lookup = hlsl_new_sm4_lookup_tables()))
+        {
+            vkd3d_free((void *)ctx->source_files[0]);
+            vkd3d_free(ctx->source_files);
+            return false;
+        }
+    }
+
     return true;
 }

@@ -3381,6 +3391,7 @@ static void hlsl_ctx_cleanup(struct hlsl_ctx *ctx)
         vkd3d_free(buffer);
     }

+    vkd3d_free(ctx->lookup);
     vkd3d_free(ctx->constant_defs.regs);
 }

diff --git a/libs/vkd3d-shader/hlsl.h b/libs/vkd3d-shader/hlsl.h
index 668690bd..7ff3b98c 100644
--- a/libs/vkd3d-shader/hlsl.h
+++ b/libs/vkd3d-shader/hlsl.h
@@ -738,6 +738,8 @@ struct hlsl_buffer
     bool automatically_packed_elements;
 };

+struct vkd3d_sm4_lookup_tables;
+
 struct hlsl_ctx
 {
     const struct hlsl_profile_info *profile;
@@ -806,6 +808,9 @@ struct hlsl_ctx
         struct hlsl_type *Void;
     } builtin_types;

+    /* Auxiliar lookup tables used for writing shader model 4 and 5 bytecode. */
+    struct vkd3d_sm4_lookup_tables *lookup;
+
     /* List of the instruction nodes for initializing static variables. */
     struct hlsl_block static_initializers;

@@ -1246,6 +1251,7 @@ bool hlsl_sm1_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_sem
 bool hlsl_sm1_usage_from_semantic(const struct hlsl_semantic *semantic, D3DDECLUSAGE *usage, uint32_t *usage_idx);
 int hlsl_sm1_write(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func, struct vkd3d_shader_code *out);

+struct vkd3d_sm4_lookup_tables *hlsl_new_sm4_lookup_tables(void);
 bool hlsl_sm4_usage_from_semantic(struct hlsl_ctx *ctx,
         const struct hlsl_semantic *semantic, bool output, D3D_NAME *usage);
 bool hlsl_sm4_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_semantic *semantic,
diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 77cadb94..a43175f9 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -430,6 +430,8 @@ enum vkd3d_sm4_register_type
     VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL  = 0x26,
     VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL     = 0x27,
     VKD3D_SM5_RT_OUTPUT_STENCIL_REF      = 0x29,
+
+    VKD3D_SM4_REGISTER_TYPE_COUNT,
 };

enum vkd3d_sm4_extended_operand_type
@@ -571,6 +573,12 @@ struct sm4_index_range_array
     struct sm4_index_range ranges[MAX_REG_OUTPUT * 2];
 };

+struct vkd3d_sm4_lookup_tables
+{
+    const struct vkd3d_sm4_register_type_info *register_type_info_from_sm4[VKD3D_SM4_REGISTER_TYPE_COUNT];
+    const struct vkd3d_sm4_register_type_info *register_type_info_from_vkd3d[VKD3DSPR_COUNT];
+};
+
 struct vkd3d_shader_sm4_parser
 {
     const uint32_t *start, *end, *ptr;
@@ -587,6 +595,8 @@ struct vkd3d_shader_sm4_parser
     struct sm4_index_range_array output_index_ranges;
     struct sm4_index_range_array patch_constant_index_ranges;

+    struct vkd3d_sm4_lookup_tables *lookup;
+
     struct vkd3d_shader_parser p;
 };

@@ -1468,50 +1478,50 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
     {VKD3D_SM5_OP_CHECK_ACCESS_FULLY_MAPPED,        VKD3DSIH_CHECK_ACCESS_FULLY_MAPPED,        "u",    "u"},
 };

-static const enum vkd3d_shader_register_type register_type_table[] =
-{
-    /* VKD3D_SM4_RT_TEMP */                    VKD3DSPR_TEMP,
-    /* VKD3D_SM4_RT_INPUT */                   VKD3DSPR_INPUT,
-    /* VKD3D_SM4_RT_OUTPUT */                  VKD3DSPR_OUTPUT,
-    /* VKD3D_SM4_RT_INDEXABLE_TEMP */          VKD3DSPR_IDXTEMP,
-    /* VKD3D_SM4_RT_IMMCONST */                VKD3DSPR_IMMCONST,
-    /* VKD3D_SM4_RT_IMMCONST64 */              VKD3DSPR_IMMCONST64,
-    /* VKD3D_SM4_RT_SAMPLER */                 VKD3DSPR_SAMPLER,
-    /* VKD3D_SM4_RT_RESOURCE */                VKD3DSPR_RESOURCE,
-    /* VKD3D_SM4_RT_CONSTBUFFER */             VKD3DSPR_CONSTBUFFER,
-    /* VKD3D_SM4_RT_IMMCONSTBUFFER */          VKD3DSPR_IMMCONSTBUFFER,
-    /* UNKNOWN */                              ~0u,
-    /* VKD3D_SM4_RT_PRIMID */                  VKD3DSPR_PRIMID,
-    /* VKD3D_SM4_RT_DEPTHOUT */                VKD3DSPR_DEPTHOUT,
-    /* VKD3D_SM4_RT_NULL */                    VKD3DSPR_NULL,
-    /* VKD3D_SM4_RT_RASTERIZER */              VKD3DSPR_RASTERIZER,
-    /* VKD3D_SM4_RT_OMASK */                   VKD3DSPR_SAMPLEMASK,
-    /* VKD3D_SM5_RT_STREAM */                  VKD3DSPR_STREAM,
-    /* VKD3D_SM5_RT_FUNCTION_BODY */           VKD3DSPR_FUNCTIONBODY,
-    /* UNKNOWN */                              ~0u,
-    /* VKD3D_SM5_RT_FUNCTION_POINTER */        VKD3DSPR_FUNCTIONPOINTER,
-    /* UNKNOWN */                              ~0u,
-    /* UNKNOWN */                              ~0u,
-    /* VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID */ VKD3DSPR_OUTPOINTID,
-    /* VKD3D_SM5_RT_FORK_INSTANCE_ID */        VKD3DSPR_FORKINSTID,
-    /* VKD3D_SM5_RT_JOIN_INSTANCE_ID */        VKD3DSPR_JOININSTID,
-    /* VKD3D_SM5_RT_INPUT_CONTROL_POINT */     VKD3DSPR_INCONTROLPOINT,
-    /* VKD3D_SM5_RT_OUTPUT_CONTROL_POINT */    VKD3DSPR_OUTCONTROLPOINT,
-    /* VKD3D_SM5_RT_PATCH_CONSTANT_DATA */     VKD3DSPR_PATCHCONST,
-    /* VKD3D_SM5_RT_DOMAIN_LOCATION */         VKD3DSPR_TESSCOORD,
-    /* UNKNOWN */                              ~0u,
-    /* VKD3D_SM5_RT_UAV */                     VKD3DSPR_UAV,
-    /* VKD3D_SM5_RT_SHARED_MEMORY */           VKD3DSPR_GROUPSHAREDMEM,
-    /* VKD3D_SM5_RT_THREAD_ID */               VKD3DSPR_THREADID,
-    /* VKD3D_SM5_RT_THREAD_GROUP_ID */         VKD3DSPR_THREADGROUPID,
-    /* VKD3D_SM5_RT_LOCAL_THREAD_ID */         VKD3DSPR_LOCALTHREADID,
-    /* VKD3D_SM5_RT_COVERAGE */                VKD3DSPR_COVERAGE,
-    /* VKD3D_SM5_RT_LOCAL_THREAD_INDEX */      VKD3DSPR_LOCALTHREADINDEX,
-    /* VKD3D_SM5_RT_GS_INSTANCE_ID */          VKD3DSPR_GSINSTID,
-    /* VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL */  VKD3DSPR_DEPTHOUTGE,
-    /* VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL */     VKD3DSPR_DEPTHOUTLE,
-    /* VKD3D_SM5_RT_CYCLE_COUNTER */           ~0u,
-    /* VKD3D_SM5_RT_OUTPUT_STENCIL_REF */      VKD3DSPR_OUTSTENCILREF,
+struct vkd3d_sm4_register_type_info
+{
+    enum vkd3d_sm4_register_type sm4_type;
+    enum vkd3d_shader_register_type vkd3d_type;
+};
+
+static const struct vkd3d_sm4_register_type_info register_type_table[] =
+{
+    {VKD3D_SM4_RT_TEMP,                    VKD3DSPR_TEMP},
+    {VKD3D_SM4_RT_INPUT,                   VKD3DSPR_INPUT},
+    {VKD3D_SM4_RT_OUTPUT,                  VKD3DSPR_OUTPUT},
+    {VKD3D_SM4_RT_INDEXABLE_TEMP,          VKD3DSPR_IDXTEMP},
+    {VKD3D_SM4_RT_IMMCONST,                VKD3DSPR_IMMCONST},
+    {VKD3D_SM4_RT_IMMCONST64,              VKD3DSPR_IMMCONST64},
+    {VKD3D_SM4_RT_SAMPLER,                 VKD3DSPR_SAMPLER},
+    {VKD3D_SM4_RT_RESOURCE,                VKD3DSPR_RESOURCE},
+    {VKD3D_SM4_RT_CONSTBUFFER,             VKD3DSPR_CONSTBUFFER},
+    {VKD3D_SM4_RT_IMMCONSTBUFFER,          VKD3DSPR_IMMCONSTBUFFER},
+    {VKD3D_SM4_RT_PRIMID,                  VKD3DSPR_PRIMID},
+    {VKD3D_SM4_RT_DEPTHOUT,                VKD3DSPR_DEPTHOUT},
+    {VKD3D_SM4_RT_NULL,                    VKD3DSPR_NULL},
+    {VKD3D_SM4_RT_RASTERIZER,              VKD3DSPR_RASTERIZER},
+    {VKD3D_SM4_RT_OMASK,                   VKD3DSPR_SAMPLEMASK},
+    {VKD3D_SM5_RT_STREAM,                  VKD3DSPR_STREAM},
+    {VKD3D_SM5_RT_FUNCTION_BODY,           VKD3DSPR_FUNCTIONBODY},
+    {VKD3D_SM5_RT_FUNCTION_POINTER,        VKD3DSPR_FUNCTIONPOINTER},
+    {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID, VKD3DSPR_OUTPOINTID},
+    {VKD3D_SM5_RT_FORK_INSTANCE_ID,        VKD3DSPR_FORKINSTID},
+    {VKD3D_SM5_RT_JOIN_INSTANCE_ID,        VKD3DSPR_JOININSTID},
+    {VKD3D_SM5_RT_INPUT_CONTROL_POINT,     VKD3DSPR_INCONTROLPOINT},
+    {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT,    VKD3DSPR_OUTCONTROLPOINT},
+    {VKD3D_SM5_RT_PATCH_CONSTANT_DATA,     VKD3DSPR_PATCHCONST},
+    {VKD3D_SM5_RT_DOMAIN_LOCATION,         VKD3DSPR_TESSCOORD},
+    {VKD3D_SM5_RT_UAV,                     VKD3DSPR_UAV},
+    {VKD3D_SM5_RT_SHARED_MEMORY,           VKD3DSPR_GROUPSHAREDMEM},
+    {VKD3D_SM5_RT_THREAD_ID,               VKD3DSPR_THREADID},
+    {VKD3D_SM5_RT_THREAD_GROUP_ID,         VKD3DSPR_THREADGROUPID},
+    {VKD3D_SM5_RT_LOCAL_THREAD_ID,         VKD3DSPR_LOCALTHREADID},
+    {VKD3D_SM5_RT_COVERAGE,                VKD3DSPR_COVERAGE},
+    {VKD3D_SM5_RT_LOCAL_THREAD_INDEX,      VKD3DSPR_LOCALTHREADINDEX},
+    {VKD3D_SM5_RT_GS_INSTANCE_ID,          VKD3DSPR_GSINSTID},
+    {VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL,  VKD3DSPR_DEPTHOUTGE},
+    {VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL,     VKD3DSPR_DEPTHOUTLE},
+    {VKD3D_SM5_RT_OUTPUT_STENCIL_REF,      VKD3DSPR_OUTSTENCILREF},
 };

static const enum vkd3d_shader_register_precision register_precision_table[] =
@@ -1530,12 +1540,47 @@ static const struct vkd3d_sm4_opcode_info *get_opcode_info(enum vkd3d_sm4_opcode

for (i = 0; i < sizeof(opcode_table) / sizeof(*opcode_table); ++i)
     {
-        if (opcode == opcode_table[i].opcode) return &opcode_table[i];
+        if (opcode == opcode_table[i].opcode)
+            return &opcode_table[i];
     }

return NULL;
 }

+struct vkd3d_sm4_lookup_tables *hlsl_new_sm4_lookup_tables(void)
+{
+    unsigned int i, t;
+
+    struct vkd3d_sm4_lookup_tables *lookup;
+
+    if (!(lookup = vkd3d_calloc(1, sizeof(*lookup))))
+        return NULL;
+
+    for (i = 0; i < ARRAY_SIZE(register_type_table); ++i)
+    {
+        t = register_type_table[i].sm4_type;
+        lookup->register_type_info_from_sm4[t] = &register_type_table[i];
+        t = register_type_table[i].vkd3d_type;
+        lookup->register_type_info_from_vkd3d[t] = &register_type_table[i];
+    }
+
+    return lookup;
+}
+
+static const struct vkd3d_sm4_register_type_info *get_info_from_sm4_register_type(
+        struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_register_type sm4_type)
+{
+    assert(sm4_type < VKD3D_SM4_REGISTER_TYPE_COUNT);
+    return lookup->register_type_info_from_sm4[sm4_type];
+}
+
+static const struct vkd3d_sm4_register_type_info *get_info_from_vkd3d_register_type(
+        struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_shader_register_type vkd3d_type)
+{
+    assert(vkd3d_type < VKD3DSPR_COUNT);
+    return lookup->register_type_info_from_vkd3d[vkd3d_type];
+}
+
 static void map_register(const struct vkd3d_shader_sm4_parser *sm4, struct vkd3d_shader_register *reg)
 {
     switch (sm4->p.shader_version.type)
@@ -1593,6 +1638,7 @@ static void shader_sm4_destroy(struct vkd3d_shader_parser *parser)

shader_instruction_array_destroy(&parser->instructions);
     free_shader_desc(&parser->shader_desc);
+    vkd3d_free(sm4->lookup);
     vkd3d_free(sm4);
 }

@@ -1642,6 +1688,7 @@ static bool sm4_register_is_descriptor(enum vkd3d_sm4_register_type register_typ
 static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end,
         enum vkd3d_data_type data_type, struct vkd3d_shader_register *param, enum vkd3d_shader_src_modifier *modifier)
 {
+    const struct vkd3d_sm4_register_type_info *register_type_info;
     enum vkd3d_sm4_register_precision precision;
     enum vkd3d_sm4_register_type register_type;
     enum vkd3d_sm4_extended_operand_type type;
@@ -1656,15 +1703,15 @@ static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const ui
     token = *(*ptr)++;

register_type = (token & VKD3D_SM4_REGISTER_TYPE_MASK) >> VKD3D_SM4_REGISTER_TYPE_SHIFT;
-    if (register_type >= ARRAY_SIZE(register_type_table)
-            || register_type_table[register_type] == VKD3DSPR_INVALID)
+    register_type_info = get_info_from_sm4_register_type(priv->lookup, register_type);
+    if (!register_type_info)
     {
         FIXME("Unhandled register type %#x.\n", register_type);
         param->type = VKD3DSPR_TEMP;
     }
     else
     {
-        param->type = register_type_table[register_type];
+        param->type = register_type_info->vkd3d_type;
     }
     param->precision = VKD3D_SHADER_REGISTER_PRECISION_DEFAULT;
     param->non_uniform = false;
@@ -2364,6 +2411,9 @@ static bool shader_sm4_init(struct vkd3d_shader_sm4_parser *sm4, const uint32_t
         sm4->output_map[e->register_index] = e->semantic_index;
     }

+    if (!(sm4->lookup = hlsl_new_sm4_lookup_tables()))
+        return false;
+
     return true;
 }

@@ -3678,20 +3728,20 @@ static void sm4_src_from_node(struct sm4_src_register *src,

static uint32_t sm4_encode_register(struct hlsl_ctx *ctx, const struct sm4_register *reg)
 {
-    uint32_t sm4_reg_type = ~0u;
-    unsigned int i;
+    const struct vkd3d_sm4_register_type_info *register_type_info;
+    uint32_t sm4_reg_type;

-    /* Find sm4 register type from vkd3d_shader_register_type. */
-    for (i = 0; i < ARRAY_SIZE(register_type_table); ++i)
+    register_type_info = get_info_from_vkd3d_register_type(ctx->lookup, reg->type);
+
+    if (!register_type_info)
     {
-        if (reg->type == register_type_table[i])
-        {
-            if (sm4_reg_type != ~0u)
-                ERR("Multiple maps for register_type %#x.\n", reg->type);
-            sm4_reg_type = i;
-        }
+        FIXME("Unhandled vkd3d-shader register type %#x.\n", reg->type);
+        sm4_reg_type = VKD3D_SM4_RT_TEMP;
+    }
+    else
+    {
+        sm4_reg_type = register_type_info->sm4_type;
     }
-    assert(sm4_reg_type != ~0u);

return (sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT)
             | (reg->idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT)
diff --git a/libs/vkd3d-shader/vkd3d_shader_private.h b/libs/vkd3d-shader/vkd3d_shader_private.h
index 49ad7b3e..c40690e3 100644
--- a/libs/vkd3d-shader/vkd3d_shader_private.h
+++ b/libs/vkd3d-shader/vkd3d_shader_private.h
@@ -508,6 +508,8 @@ enum vkd3d_shader_register_type
     VKD3DSPR_RASTERIZER,
     VKD3DSPR_OUTSTENCILREF,

+    VKD3DSPR_COUNT,
+
     VKD3DSPR_INVALID = ~0u,
 };

[PATCH v4 07/10] vkd3d-shader/tpf: Separate src register write function.

[Francisco Casas]

From: Francisco Casas

---
 libs/vkd3d-shader/tpf.c | 85 +++++++++++++++++++++++++++--------------
 1 file changed, 56 insertions(+), 29 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index a43175f9..734b0d96 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -3748,6 +3748,61 @@ static uint32_t sm4_encode_register(struct hlsl_ctx *ctx, const struct sm4_regis
             | (reg->dim << VKD3D_SM4_DIMENSION_SHIFT);
 }

+static void sm4_write_src_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        const struct sm4_src_register *src)
+{
+    const struct vkd3d_sm4_register_type_info *register_type_info;
+    uint32_t sm4_reg_type, reg_dim;
+    uint32_t token = 0;
+    unsigned int j;
+
+    register_type_info = get_info_from_vkd3d_register_type(ctx->lookup, src->reg.type);
+    if (!register_type_info)
+    {
+        FIXME("Unhandled vkd3d-shader register type %#x.\n", src->reg.type);
+        sm4_reg_type = VKD3D_SM4_RT_TEMP;
+    }
+    else
+    {
+        sm4_reg_type = register_type_info->sm4_type;
+    }
+
+    reg_dim = src->reg.dim;
+
+    token |= sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT;
+    token |= src->reg.idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT;
+    token |= reg_dim << VKD3D_SM4_DIMENSION_SHIFT;
+    if (reg_dim == VKD3D_SM4_DIMENSION_VEC4)
+    {
+        token |= (uint32_t)src->swizzle_type << VKD3D_SM4_SWIZZLE_TYPE_SHIFT;
+        token |= src->swizzle << VKD3D_SM4_SWIZZLE_SHIFT;
+    }
+    if (src->reg.mod)
+        token |= VKD3D_SM4_EXTENDED_OPERAND;
+    put_u32(buffer, token);
+
+    if (src->reg.mod)
+        put_u32(buffer, (src->reg.mod << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)
+                | VKD3D_SM4_EXTENDED_OPERAND_MODIFIER);
+
+    for (j = 0; j < src->reg.idx_count; ++j)
+    {
+        put_u32(buffer, src->reg.idx[j].offset);
+        assert(!src->reg.idx[j].rel_addr);
+    }
+
+    if (src->reg.type == VKD3DSPR_IMMCONST)
+    {
+        put_u32(buffer, src->reg.immconst_uint[0]);
+        if (reg_dim == VKD3D_SM4_DIMENSION_VEC4)
+        {
+            put_u32(buffer, src->reg.immconst_uint[1]);
+            put_u32(buffer, src->reg.immconst_uint[2]);
+            put_u32(buffer, src->reg.immconst_uint[3]);
+        }
+    }
+}
+
 static uint32_t sm4_register_order(const struct sm4_register *reg)
 {
     uint32_t order = 1;
@@ -3803,35 +3858,7 @@ static void write_sm4_instruction(struct hlsl_ctx *ctx, struct vkd3d_bytecode_bu
     }

for (i = 0; i < instr->src_count; ++i)
-    {
-        token = sm4_encode_register(ctx, &instr->srcs[i].reg);
-        token |= (uint32_t)instr->srcs[i].swizzle_type << VKD3D_SM4_SWIZZLE_TYPE_SHIFT;
-        token |= instr->srcs[i].swizzle << VKD3D_SM4_SWIZZLE_SHIFT;
-        if (instr->srcs[i].reg.mod)
-            token |= VKD3D_SM4_EXTENDED_OPERAND;
-        put_u32(buffer, token);
-
-        if (instr->srcs[i].reg.mod)
-            put_u32(buffer, (instr->srcs[i].reg.mod << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)
-                    | VKD3D_SM4_EXTENDED_OPERAND_MODIFIER);
-
-        for (j = 0; j < instr->srcs[i].reg.idx_count; ++j)
-        {
-            put_u32(buffer, instr->srcs[i].reg.idx[j].offset);
-            assert(!instr->srcs[i].reg.idx[j].rel_addr);
-        }
-
-        if (instr->srcs[i].reg.type == VKD3DSPR_IMMCONST)
-        {
-            put_u32(buffer, instr->srcs[i].reg.immconst_uint[0]);
-            if (instr->srcs[i].reg.dim == VKD3D_SM4_DIMENSION_VEC4)
-            {
-                put_u32(buffer, instr->srcs[i].reg.immconst_uint[1]);
-                put_u32(buffer, instr->srcs[i].reg.immconst_uint[2]);
-                put_u32(buffer, instr->srcs[i].reg.immconst_uint[3]);
-            }
-        }
-    }
+        sm4_write_src_register(ctx, buffer, &instr->srcs[i]);

if (instr->byte_stride)
         put_u32(buffer, instr->byte_stride);

[PATCH v4 08/10] vkd3d-shader/tpf: Separate dst register write function.

[Francisco Casas]

From: Francisco Casas

---
 libs/vkd3d-shader/tpf.c | 41 +++++++++++++++++++++--------------------
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 734b0d96..40d55714 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -3726,16 +3726,17 @@ static void sm4_src_from_node(struct sm4_src_register *src,
         src->swizzle = hlsl_map_swizzle(hlsl_swizzle_from_writemask(writemask), map_writemask);
 }

-static uint32_t sm4_encode_register(struct hlsl_ctx *ctx, const struct sm4_register *reg)
+static void sm4_write_dst_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer, const struct sm4_dst_register *dst)
 {
     const struct vkd3d_sm4_register_type_info *register_type_info;
-    uint32_t sm4_reg_type;
-
-    register_type_info = get_info_from_vkd3d_register_type(ctx->lookup, reg->type);
+    uint32_t sm4_reg_type, reg_dim;
+    uint32_t token = 0;
+    unsigned int j;

+    register_type_info = get_info_from_vkd3d_register_type(ctx->lookup, dst->reg.type);
     if (!register_type_info)
     {
-        FIXME("Unhandled vkd3d-shader register type %#x.\n", reg->type);
+        FIXME("Unhandled vkd3d-shader register type %#x.\n", dst->reg.type);
         sm4_reg_type = VKD3D_SM4_RT_TEMP;
     }
     else
@@ -3743,9 +3744,20 @@ static uint32_t sm4_encode_register(struct hlsl_ctx *ctx, const struct sm4_regis
         sm4_reg_type = register_type_info->sm4_type;
     }

-    return (sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT)
-            | (reg->idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT)
-            | (reg->dim << VKD3D_SM4_DIMENSION_SHIFT);
+    reg_dim = dst->reg.dim;
+
+    token |= sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT;
+    token |= dst->reg.idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT;
+    token |= reg_dim << VKD3D_SM4_DIMENSION_SHIFT;
+    if (reg_dim == VKD3D_SM4_DIMENSION_VEC4)
+        token |= dst->writemask << VKD3D_SM4_WRITEMASK_SHIFT;
+    put_u32(buffer, token);
+
+    for (j = 0; j < dst->reg.idx_count; ++j)
+    {
+        put_u32(buffer, dst->reg.idx[j].offset);
+        assert(!dst->reg.idx[j].rel_addr);
+    }
 }

static void sm4_write_src_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
@@ -3844,18 +3856,7 @@ static void write_sm4_instruction(struct hlsl_ctx *ctx, struct vkd3d_bytecode_bu
     }

for (i = 0; i < instr->dst_count; ++i)
-    {
-        token = sm4_encode_register(ctx, &instr->dsts[i].reg);
-        if (instr->dsts[i].reg.dim == VKD3D_SM4_DIMENSION_VEC4)
-            token |= instr->dsts[i].writemask << VKD3D_SM4_WRITEMASK_SHIFT;
-        put_u32(buffer, token);
-
-        for (j = 0; j < instr->dsts[i].reg.idx_count; ++j)
-        {
-            put_u32(buffer, instr->dsts[i].reg.idx[j].offset);
-            assert(!instr->dsts[i].reg.idx[j].rel_addr);
-        }
-    }
+        sm4_write_dst_register(ctx, buffer, &instr->dsts[i]);

for (i = 0; i < instr->src_count; ++i)
         sm4_write_src_register(ctx, buffer, &instr->srcs[i]);

[PATCH v4 09/10] vkd3d-shader/tpf: Use 's' in src_info to expect sampler register with vec4 dimension.

[Francisco Casas]

From: Francisco Casas

So far, for every register type we write we only use a single dimension type.
The only exception being the sampler register for gather instructions,
where the register dimension must be VEC4 (and the swizzle_type SCALAR)
instead of NONE.

To get rid of sm4_src_register.dim, we need a way to handle this
nasty exception, which is provided by this patch.
---
 libs/vkd3d-shader/tpf.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 40d55714..41d40afd 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -1206,6 +1206,7 @@ static void shader_sm5_read_sync(struct vkd3d_shader_instruction *ins, uint32_t
  * O -> VKD3D_DATA_OPAQUE
  * R -> VKD3D_DATA_RESOURCE
  * S -> VKD3D_DATA_SAMPLER
+ * s -> VKD3D_DATA_SAMPLER with scalar swizzle
  * U -> VKD3D_DATA_UAV
  */
 static const struct vkd3d_sm4_opcode_info opcode_table[] =
@@ -1337,7 +1338,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
     {VKD3D_SM4_OP_DCL_GLOBAL_FLAGS,                 VKD3DSIH_DCL_GLOBAL_FLAGS,                 "",     "",
             shader_sm4_read_dcl_global_flags},
     {VKD3D_SM4_OP_LOD,                              VKD3DSIH_LOD,                              "f",    "fRS"},
-    {VKD3D_SM4_OP_GATHER4,                          VKD3DSIH_GATHER4,                          "u",    "fRS"},
+    {VKD3D_SM4_OP_GATHER4,                          VKD3DSIH_GATHER4,                          "u",    "fRs"},
     {VKD3D_SM4_OP_SAMPLE_POS,                       VKD3DSIH_SAMPLE_POS,                       "f",    "Ru"},
     {VKD3D_SM4_OP_SAMPLE_INFO,                      VKD3DSIH_SAMPLE_INFO,                      "f",    "R"},
     {VKD3D_SM5_OP_HS_DECLS,                         VKD3DSIH_HS_DECLS,                         "",     ""},
@@ -1353,9 +1354,9 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
     {VKD3D_SM5_OP_DERIV_RTX_FINE,                   VKD3DSIH_DSX_FINE,                         "f",    "f"},
     {VKD3D_SM5_OP_DERIV_RTY_COARSE,                 VKD3DSIH_DSY_COARSE,                       "f",    "f"},
     {VKD3D_SM5_OP_DERIV_RTY_FINE,                   VKD3DSIH_DSY_FINE,                         "f",    "f"},
-    {VKD3D_SM5_OP_GATHER4_C,                        VKD3DSIH_GATHER4_C,                        "f",    "fRSf"},
-    {VKD3D_SM5_OP_GATHER4_PO,                       VKD3DSIH_GATHER4_PO,                       "f",    "fiRS"},
-    {VKD3D_SM5_OP_GATHER4_PO_C,                     VKD3DSIH_GATHER4_PO_C,                     "f",    "fiRSf"},
+    {VKD3D_SM5_OP_GATHER4_C,                        VKD3DSIH_GATHER4_C,                        "f",    "fRsf"},
+    {VKD3D_SM5_OP_GATHER4_PO,                       VKD3DSIH_GATHER4_PO,                       "f",    "fiRs"},
+    {VKD3D_SM5_OP_GATHER4_PO_C,                     VKD3DSIH_GATHER4_PO_C,                     "f",    "fiRsf"},
     {VKD3D_SM5_OP_RCP,                              VKD3DSIH_RCP,                              "f",    "f"},
     {VKD3D_SM5_OP_F32TOF16,                         VKD3DSIH_F32TOF16,                         "u",    "f"},
     {VKD3D_SM5_OP_F16TOF32,                         VKD3DSIH_F16TOF32,                         "f",    "u"},
@@ -1623,6 +1624,7 @@ static enum vkd3d_data_type map_data_type(char t)
         case 'R':
             return VKD3D_DATA_RESOURCE;
         case 'S':
+        case 's':
             return VKD3D_DATA_SAMPLER;
         case 'U':
             return VKD3D_DATA_UAV;
@@ -3726,7 +3728,8 @@ static void sm4_src_from_node(struct sm4_src_register *src,
         src->swizzle = hlsl_map_swizzle(hlsl_swizzle_from_writemask(writemask), map_writemask);
 }

-static void sm4_write_dst_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer, const struct sm4_dst_register *dst)
+static void sm4_write_dst_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
+        const struct sm4_dst_register *dst, char dst_info)
 {
     const struct vkd3d_sm4_register_type_info *register_type_info;
     uint32_t sm4_reg_type, reg_dim;
@@ -3761,7 +3764,7 @@ static void sm4_write_dst_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
 }

static void sm4_write_src_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
-        const struct sm4_src_register *src)
+        const struct sm4_src_register *src, char src_info)
 {
     const struct vkd3d_sm4_register_type_info *register_type_info;
     uint32_t sm4_reg_type, reg_dim;
@@ -3780,6 +3783,8 @@ static void sm4_write_src_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
     }

reg_dim = src->reg.dim;
+    if (src_info == 's')
+        reg_dim = VKD3D_SM4_DIMENSION_VEC4;

token |= sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT;
     token |= src->reg.idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT;
@@ -3829,6 +3834,7 @@ static uint32_t sm4_register_order(const struct sm4_register *reg)
 static void write_sm4_instruction(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer,
         const struct sm4_instruction *instr)
 {
+    const struct vkd3d_sm4_opcode_info *opcode_info = get_opcode_info(instr->opcode);
     uint32_t token = instr->opcode;
     unsigned int size = 1, i, j;

@@ -3856,10 +3862,10 @@ static void write_sm4_instruction(struct hlsl_ctx *ctx, struct vkd3d_bytecode_bu
     }

for (i = 0; i < instr->dst_count; ++i)
-        sm4_write_dst_register(ctx, buffer, &instr->dsts[i]);
+        sm4_write_dst_register(ctx, buffer, &instr->dsts[i], opcode_info ? opcode_info->dst_info[i] : ' ');

for (i = 0; i < instr->src_count; ++i)
-        sm4_write_src_register(ctx, buffer, &instr->srcs[i]);
+        sm4_write_src_register(ctx, buffer, &instr->srcs[i], opcode_info ? opcode_info->src_info[i] : ' ');

if (instr->byte_stride)
         put_u32(buffer, instr->byte_stride);
@@ -5161,7 +5167,6 @@ static void write_sm4_gather(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer

src = &instr.srcs[instr.src_count++];
     sm4_src_from_deref(ctx, src, sampler, VKD3DSP_WRITEMASK_ALL);
-    src->reg.dim = VKD3D_SM4_DIMENSION_VEC4;
     src->swizzle_type = VKD3D_SM4_SWIZZLE_SCALAR;
     src->swizzle = swizzle;

[PATCH v4 10/10] vkd3d-shader/tpf: Get rid of sm4_register.dim.

[Francisco Casas]

From: Francisco Casas

---
 libs/vkd3d-shader/tpf.c | 114 +++++++++++++++++-----------------------
 1 file changed, 49 insertions(+), 65 deletions(-)

diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c
index 41d40afd..f8fc40c3 100644
--- a/libs/vkd3d-shader/tpf.c
+++ b/libs/vkd3d-shader/tpf.c
@@ -1483,46 +1483,47 @@ struct vkd3d_sm4_register_type_info
 {
     enum vkd3d_sm4_register_type sm4_type;
     enum vkd3d_shader_register_type vkd3d_type;
+    enum vkd3d_sm4_dimension default_dimension;
 };

static const struct vkd3d_sm4_register_type_info register_type_table[] =
 {
-    {VKD3D_SM4_RT_TEMP,                    VKD3DSPR_TEMP},
-    {VKD3D_SM4_RT_INPUT,                   VKD3DSPR_INPUT},
-    {VKD3D_SM4_RT_OUTPUT,                  VKD3DSPR_OUTPUT},
-    {VKD3D_SM4_RT_INDEXABLE_TEMP,          VKD3DSPR_IDXTEMP},
-    {VKD3D_SM4_RT_IMMCONST,                VKD3DSPR_IMMCONST},
-    {VKD3D_SM4_RT_IMMCONST64,              VKD3DSPR_IMMCONST64},
-    {VKD3D_SM4_RT_SAMPLER,                 VKD3DSPR_SAMPLER},
-    {VKD3D_SM4_RT_RESOURCE,                VKD3DSPR_RESOURCE},
-    {VKD3D_SM4_RT_CONSTBUFFER,             VKD3DSPR_CONSTBUFFER},
-    {VKD3D_SM4_RT_IMMCONSTBUFFER,          VKD3DSPR_IMMCONSTBUFFER},
-    {VKD3D_SM4_RT_PRIMID,                  VKD3DSPR_PRIMID},
-    {VKD3D_SM4_RT_DEPTHOUT,                VKD3DSPR_DEPTHOUT},
-    {VKD3D_SM4_RT_NULL,                    VKD3DSPR_NULL},
-    {VKD3D_SM4_RT_RASTERIZER,              VKD3DSPR_RASTERIZER},
-    {VKD3D_SM4_RT_OMASK,                   VKD3DSPR_SAMPLEMASK},
-    {VKD3D_SM5_RT_STREAM,                  VKD3DSPR_STREAM},
-    {VKD3D_SM5_RT_FUNCTION_BODY,           VKD3DSPR_FUNCTIONBODY},
-    {VKD3D_SM5_RT_FUNCTION_POINTER,        VKD3DSPR_FUNCTIONPOINTER},
-    {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID, VKD3DSPR_OUTPOINTID},
-    {VKD3D_SM5_RT_FORK_INSTANCE_ID,        VKD3DSPR_FORKINSTID},
-    {VKD3D_SM5_RT_JOIN_INSTANCE_ID,        VKD3DSPR_JOININSTID},
-    {VKD3D_SM5_RT_INPUT_CONTROL_POINT,     VKD3DSPR_INCONTROLPOINT},
-    {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT,    VKD3DSPR_OUTCONTROLPOINT},
-    {VKD3D_SM5_RT_PATCH_CONSTANT_DATA,     VKD3DSPR_PATCHCONST},
-    {VKD3D_SM5_RT_DOMAIN_LOCATION,         VKD3DSPR_TESSCOORD},
-    {VKD3D_SM5_RT_UAV,                     VKD3DSPR_UAV},
-    {VKD3D_SM5_RT_SHARED_MEMORY,           VKD3DSPR_GROUPSHAREDMEM},
-    {VKD3D_SM5_RT_THREAD_ID,               VKD3DSPR_THREADID},
-    {VKD3D_SM5_RT_THREAD_GROUP_ID,         VKD3DSPR_THREADGROUPID},
-    {VKD3D_SM5_RT_LOCAL_THREAD_ID,         VKD3DSPR_LOCALTHREADID},
-    {VKD3D_SM5_RT_COVERAGE,                VKD3DSPR_COVERAGE},
-    {VKD3D_SM5_RT_LOCAL_THREAD_INDEX,      VKD3DSPR_LOCALTHREADINDEX},
-    {VKD3D_SM5_RT_GS_INSTANCE_ID,          VKD3DSPR_GSINSTID},
-    {VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL,  VKD3DSPR_DEPTHOUTGE},
-    {VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL,     VKD3DSPR_DEPTHOUTLE},
-    {VKD3D_SM5_RT_OUTPUT_STENCIL_REF,      VKD3DSPR_OUTSTENCILREF},
+    {VKD3D_SM4_RT_TEMP,                    VKD3DSPR_TEMP,            VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_INPUT,                   VKD3DSPR_INPUT,           VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_OUTPUT,                  VKD3DSPR_OUTPUT,          VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_INDEXABLE_TEMP,          VKD3DSPR_IDXTEMP,         VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_IMMCONST,                VKD3DSPR_IMMCONST,        0},
+    {VKD3D_SM4_RT_IMMCONST64,              VKD3DSPR_IMMCONST64,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_SAMPLER,                 VKD3DSPR_SAMPLER,         VKD3D_SM4_DIMENSION_NONE},
+    {VKD3D_SM4_RT_RESOURCE,                VKD3DSPR_RESOURCE,        VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_CONSTBUFFER,             VKD3DSPR_CONSTBUFFER,     VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_IMMCONSTBUFFER,          VKD3DSPR_IMMCONSTBUFFER,  VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_PRIMID,                  VKD3DSPR_PRIMID,          VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_DEPTHOUT,                VKD3DSPR_DEPTHOUT,        VKD3D_SM4_DIMENSION_SCALAR},
+    {VKD3D_SM4_RT_NULL,                    VKD3DSPR_NULL,            VKD3D_SM4_DIMENSION_NONE},
+    {VKD3D_SM4_RT_RASTERIZER,              VKD3DSPR_RASTERIZER,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM4_RT_OMASK,                   VKD3DSPR_SAMPLEMASK,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_STREAM,                  VKD3DSPR_STREAM,          VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_FUNCTION_BODY,           VKD3DSPR_FUNCTIONBODY,    VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_FUNCTION_POINTER,        VKD3DSPR_FUNCTIONPOINTER, VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT_ID, VKD3DSPR_OUTPOINTID,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_FORK_INSTANCE_ID,        VKD3DSPR_FORKINSTID,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_JOIN_INSTANCE_ID,        VKD3DSPR_JOININSTID,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_INPUT_CONTROL_POINT,     VKD3DSPR_INCONTROLPOINT,  VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_OUTPUT_CONTROL_POINT,    VKD3DSPR_OUTCONTROLPOINT, VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_PATCH_CONSTANT_DATA,     VKD3DSPR_PATCHCONST,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_DOMAIN_LOCATION,         VKD3DSPR_TESSCOORD,       VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_UAV,                     VKD3DSPR_UAV,             VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_SHARED_MEMORY,           VKD3DSPR_GROUPSHAREDMEM,  VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_THREAD_ID,               VKD3DSPR_THREADID,        VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_THREAD_GROUP_ID,         VKD3DSPR_THREADGROUPID,   VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_LOCAL_THREAD_ID,         VKD3DSPR_LOCALTHREADID,   VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_COVERAGE,                VKD3DSPR_COVERAGE,        VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_LOCAL_THREAD_INDEX,      VKD3DSPR_LOCALTHREADINDEX,VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_GS_INSTANCE_ID,          VKD3DSPR_GSINSTID,        VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_DEPTHOUT_GREATER_EQUAL,  VKD3DSPR_DEPTHOUTGE,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL,     VKD3DSPR_DEPTHOUTLE,      VKD3D_SM4_DIMENSION_VEC4},
+    {VKD3D_SM5_RT_OUTPUT_STENCIL_REF,      VKD3DSPR_OUTSTENCILREF,   VKD3D_SM4_DIMENSION_VEC4},
 };

static const enum vkd3d_shader_register_precision register_precision_table[] =
@@ -3485,7 +3486,7 @@ struct sm4_register
     enum vkd3d_shader_register_type type;
     struct vkd3d_shader_register_index idx[2];
     unsigned int idx_count;
-    enum vkd3d_sm4_dimension dim;
+    enum vkd3d_immconst_type immconst_type;
     uint32_t immconst_uint[4];
     unsigned int mod;
 };
@@ -3532,7 +3533,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
         if (regset == HLSL_REGSET_TEXTURES)
         {
             reg->type = VKD3DSPR_RESOURCE;
-            reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
             reg->idx[0].offset = var->regs[HLSL_REGSET_TEXTURES].id;
@@ -3544,7 +3544,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
         else if (regset == HLSL_REGSET_UAVS)
         {
             reg->type = VKD3DSPR_UAV;
-            reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
             reg->idx[0].offset = var->regs[HLSL_REGSET_UAVS].id;
@@ -3556,7 +3555,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
         else if (regset == HLSL_REGSET_SAMPLERS)
         {
             reg->type = VKD3DSPR_SAMPLER;
-            reg->dim = VKD3D_SM4_DIMENSION_NONE;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
             reg->idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].id;
@@ -3571,7 +3569,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r

assert(data_type->class <= HLSL_CLASS_VECTOR);
             reg->type = VKD3DSPR_CONSTBUFFER;
-            reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
             reg->idx[0].offset = var->buffer->reg.id;
@@ -3594,7 +3591,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
                 reg->idx_count = 1;
             }

-            reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             *writemask = ((1u << data_type->dimx) - 1) << (offset % 4);
         }
         else
@@ -3603,7 +3599,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r

assert(hlsl_reg.allocated);
             reg->type = VKD3DSPR_INPUT;
-            reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             if (swizzle_type)
                 *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
             reg->idx[0].offset = hlsl_reg.id;
@@ -3625,10 +3620,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
                 reg->idx_count = 1;
             }

-            if (reg->type == VKD3DSPR_DEPTHOUT)
-                reg->dim = VKD3D_SM4_DIMENSION_SCALAR;
-            else
-                reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             *writemask = ((1u << data_type->dimx) - 1) << (offset % 4);
         }
         else
@@ -3637,7 +3628,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r

assert(hlsl_reg.allocated);
             reg->type = VKD3DSPR_OUTPUT;
-            reg->dim = VKD3D_SM4_DIMENSION_VEC4;
             reg->idx[0].offset = hlsl_reg.id;
             reg->idx_count = 1;
             *writemask = hlsl_reg.writemask;
@@ -3649,7 +3639,6 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r

assert(hlsl_reg.allocated);
         reg->type = VKD3DSPR_TEMP;
-        reg->dim = VKD3D_SM4_DIMENSION_VEC4;
         if (swizzle_type)
             *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
         reg->idx[0].offset = hlsl_reg.id;
@@ -3673,7 +3662,6 @@ static void sm4_register_from_node(struct sm4_register *reg, unsigned int *write
 {
     assert(instr->reg.allocated);
     reg->type = VKD3DSPR_TEMP;
-    reg->dim = VKD3D_SM4_DIMENSION_VEC4;
     *swizzle_type = VKD3D_SM4_SWIZZLE_VEC4;
     reg->idx[0].offset = instr->reg.id;
     reg->idx_count = 1;
@@ -3694,14 +3682,14 @@ static void sm4_src_from_constant_value(struct sm4_src_register *src,
     src->reg.type = VKD3DSPR_IMMCONST;
     if (width == 1)
     {
-        src->reg.dim = VKD3D_SM4_DIMENSION_SCALAR;
+        src->reg.immconst_type = VKD3D_IMMCONST_SCALAR;
         src->reg.immconst_uint[0] = value->u[0].u;
     }
     else
     {
         unsigned int i, j = 0;

-        src->reg.dim = VKD3D_SM4_DIMENSION_VEC4;
+        src->reg.immconst_type = VKD3D_IMMCONST_VEC4;
         for (i = 0; i < 4; ++i)
         {
             if (map_writemask & (1u << i))
@@ -3741,14 +3729,14 @@ static void sm4_write_dst_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
     {
         FIXME("Unhandled vkd3d-shader register type %#x.\n", dst->reg.type);
         sm4_reg_type = VKD3D_SM4_RT_TEMP;
+        reg_dim = VKD3D_SM4_DIMENSION_VEC4;
     }
     else
     {
         sm4_reg_type = register_type_info->sm4_type;
+        reg_dim = register_type_info->default_dimension;
     }

-    reg_dim = dst->reg.dim;
-
     token |= sm4_reg_type << VKD3D_SM4_REGISTER_TYPE_SHIFT;
     token |= dst->reg.idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT;
     token |= reg_dim << VKD3D_SM4_DIMENSION_SHIFT;
@@ -3776,13 +3764,16 @@ static void sm4_write_src_register(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
     {
         FIXME("Unhandled vkd3d-shader register type %#x.\n", src->reg.type);
         sm4_reg_type = VKD3D_SM4_RT_TEMP;
+        reg_dim = VKD3D_SM4_DIMENSION_VEC4;
     }
     else
     {
         sm4_reg_type = register_type_info->sm4_type;
+        reg_dim = register_type_info->default_dimension;
     }

-    reg_dim = src->reg.dim;
+    if (src->reg.type == VKD3DSPR_IMMCONST)
+        reg_dim = src->reg.immconst_type == VKD3D_IMMCONST_VEC4 ? VKD3D_SM4_DIMENSION_VEC4 : VKD3D_SM4_DIMENSION_SCALAR;
     if (src_info == 's')
         reg_dim = VKD3D_SM4_DIMENSION_VEC4;

@@ -3824,7 +3815,7 @@ static uint32_t sm4_register_order(const struct sm4_register *reg)
 {
     uint32_t order = 1;
     if (reg->type == VKD3DSPR_IMMCONST)
-        order += reg->dim == VKD3D_SM4_DIMENSION_VEC4 ? 4 : 1;
+        order += reg->immconst_type == VKD3D_IMMCONST_VEC4 ? 4 : 1;
     order += reg->idx_count;
     if (reg->mod)
         ++order;
@@ -3908,7 +3899,6 @@ static void write_sm4_dcl_constant_buffer(struct hlsl_ctx *ctx, struct vkd3d_byt
     {
         .opcode = VKD3D_SM4_OP_DCL_CONSTANT_BUFFER,

-        .srcs[0].reg.dim = VKD3D_SM4_DIMENSION_VEC4,
         .srcs[0].reg.type = VKD3DSPR_CONSTBUFFER,
         .srcs[0].reg.idx[0].offset = cbuffer->reg.id,
         .srcs[0].reg.idx[1].offset = (cbuffer->used_size + 3) / 4,
@@ -4017,7 +4007,6 @@ static void write_sm4_dcl_semantic(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b

struct sm4_instruction instr =
     {
-        .dsts[0].reg.dim = VKD3D_SM4_DIMENSION_VEC4,
         .dst_count = 1,
     };

@@ -4042,9 +4031,6 @@ static void write_sm4_dcl_semantic(struct hlsl_ctx *ctx, struct vkd3d_bytecode_b
         instr.dsts[0].writemask = var->regs[HLSL_REGSET_NUMERIC].writemask;
     }

-    if (instr.dsts[0].reg.type == VKD3DSPR_DEPTHOUT)
-        instr.dsts[0].reg.dim = VKD3D_SM4_DIMENSION_SCALAR;
-
     hlsl_sm4_usage_from_semantic(ctx, &var->semantic, output, &usage);
     if (usage == ~0u)
         usage = D3D_NAME_UNDEFINED;
@@ -4179,7 +4165,6 @@ static void write_sm4_unary_op_with_two_destinations(struct hlsl_ctx *ctx,
     sm4_dst_from_node(&instr.dsts[dst_idx], dst);
     assert(1 - dst_idx >= 0);
     instr.dsts[1 - dst_idx].reg.type = VKD3DSPR_NULL;
-    instr.dsts[1 - dst_idx].reg.dim = VKD3D_SM4_DIMENSION_NONE;
     instr.dsts[1 - dst_idx].reg.idx_count = 0;
     instr.dst_count = 2;

@@ -4241,7 +4226,6 @@ static void write_sm4_binary_op_with_two_destinations(struct hlsl_ctx *ctx,
     sm4_dst_from_node(&instr.dsts[dst_idx], dst);
     assert(1 - dst_idx >= 0);
     instr.dsts[1 - dst_idx].reg.type = VKD3DSPR_NULL;
-    instr.dsts[1 - dst_idx].reg.dim = VKD3D_SM4_DIMENSION_NONE;
     instr.dsts[1 - dst_idx].reg.idx_count = 0;
     instr.dst_count = 2;

@@ -4313,7 +4297,7 @@ static void write_sm4_ld(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buf
             memset(&instr.srcs[2], 0, sizeof(instr.srcs[2]));
             instr.srcs[2].swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
             reg->type = VKD3DSPR_IMMCONST;
-            reg->dim = VKD3D_SM4_DIMENSION_SCALAR;
+            reg->immconst_type = VKD3D_IMMCONST_SCALAR;
             reg->immconst_uint[0] = index->value.u[0].u;
         }
         else if (ctx->profile->major_version == 4 && ctx->profile->minor_version == 0)
@@ -4432,7 +4416,7 @@ static void write_sm4_cast_from_bool(struct hlsl_ctx *ctx,
     sm4_src_from_node(&instr.srcs[0], arg, instr.dsts[0].writemask);
     instr.srcs[1].swizzle_type = VKD3D_SM4_SWIZZLE_MASK4;
     instr.srcs[1].reg.type = VKD3DSPR_IMMCONST;
-    instr.srcs[1].reg.dim = VKD3D_SM4_DIMENSION_SCALAR;
+    instr.srcs[1].reg.immconst_type = VKD3D_IMMCONST_SCALAR;
     instr.srcs[1].reg.immconst_uint[0] = mask;
     instr.src_count = 2;

[Francisco Casas (＠fcasas)]

On Thu Jul 27 19:12:45 2023 +0000, Francisco Casas wrote:
> changed this line in [version 4 of the diff](/wine/vkd3d/-/merge_requests/281/diffs?diff_id=59763&start_sha=7d2ec1025572004a085eb820999ebcc56e8f93b5#b9a696b7e2f161c9052ff1159d7d8cb2907cdeae_579_578)

Done!

[Francisco Casas (＠fcasas)]

On Thu Jul 27 19:14:05 2023 +0000, Giovanni Mascellani wrote:
> I think we usually split the "pass `ctx` to this function" part in a
> dedicated patch. It feels much cleaner to me.

Done!

[Henri Verbeet (＠hverbeet)]

> > So it actually doesn't depend on those patches at all. :) This series might have some minor conflicts with that series, but we should simply deal with those once they actually happen; it's entirely possible for this series to go in first.
>
> Yes. Although, I am not sure if you mean that I should drop the first patch, that just renames VKD3D_SM4_SWIZZLE_MASK4 to VKD3D_SM4_SWIZZLE_NONE. Note that this renaming is only a subset of the first patch by Conor. I think that the new name is more appropriate.

I'm not quite as convinced it's an improvement, but the broader point is that it's an unrelated change, and should go in its own MR. It happens to touch some lines that the rest of this series also touches, but that can't be the only reason to include something in a series.
> +    if (ctx->profile->major_version >= 4)
> +    {
> +        if (!(ctx->lookup = hlsl_new_sm4_lookup_tables()))
> +        {
> +            vkd3d_free((void *)ctx->source_files[0]);
> +            vkd3d_free(ctx->source_files);
> +            return false;
> +        }
> +    }

I don't hate it, but I think we can do better. In particular, I don't think we need these lookup tables before calling hlsl_sm4_write(), and that means we can just call hlsl_new_sm4_lookup_tables() there, and keep all the lookup table bits local to tpf.c.

I could imagine introducing a structure like this:
```c
struct tpf_writer
{
    struct vkd3d_bytecode_buffer buffer;
    struct vkd3d_sm4_lookup_tables lookup;
    struct hlsl_ctx *ctx;
};
```
and then passing that to e.g. write_sm4_shdr().

To put this in the broader picture, we'd ultimately like the HLSL compiler to produce a vkd3d_shader_instruction_array structure, and the TPF writer to consume that structure. Ideally the functions writing TPF then wouldn't have direct knowledge about HLSL IR, and wouldn't get passed a hlsl_ctx structure. It'll probably be a while before we get there, but I think we should at least try to avoid exposing TPF details outside tpf.c. Similarly, we probably want to avoid using hlsl_ctx in TPF writer functions that currently don't need it.
> @@ -587,6 +595,8 @@ struct vkd3d_shader_sm4_parser
>      struct sm4_index_range_array output_index_ranges;
>      struct sm4_index_range_array patch_constant_index_ranges;
>
> +    struct vkd3d_sm4_lookup_tables *lookup;
> +
>      struct vkd3d_shader_parser p;
>  };

I don't think "lookup" needs to be a pointer here, right?
> +static const struct vkd3d_sm4_register_type_info register_type_table[] =
> +{
> +    {VKD3D_SM4_RT_TEMP,                    VKD3DSPR_TEMP},
> +    {VKD3D_SM4_RT_INPUT,                   VKD3DSPR_INPUT},
>  ...

Now that we're no longer accessing register_type_table[] directly, we can make it local to hlsl_new_sm4_lookup_tables().
> +static const struct vkd3d_sm4_register_type_info *get_info_from_sm4_register_type(
> +        struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_register_type sm4_type)
> +{
> +    assert(sm4_type < VKD3D_SM4_REGISTER_TYPE_COUNT);
> +    return lookup->rt_info_from_sm4[sm4_type];
> +}
>  ...
> @@ -1656,15 +1703,15 @@ static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const ui
>      token = *(*ptr)++;
>
>      register_type = (token & VKD3D_SM4_REGISTER_TYPE_MASK) >> VKD3D_SM4_REGISTER_TYPE_SHIFT;
> -    if (register_type >= ARRAY_SIZE(register_type_table)
> -            || register_type_table[register_type] == VKD3DSPR_INVALID)
> +    register_type_info = get_info_from_sm4_register_type(priv->lookup, register_type);
> +    if (!register_type_info)
>      {
>          FIXME("Unhandled register type %#x.\n", register_type);
>          param->type = VKD3DSPR_TEMP;
>      }

You can't do that. "register_type"/"sm4_type" is read from the bytecode, which is untrusted input. The existing code is perhaps not great in this regard either, but replacing the existing check with an assert makes it worse.

[Francisco Casas (＠fcasas)]

> I'm not quite as convinced it's an improvement, but the broader point is that it's an unrelated change, and should go in its own MR. It happens to touch some lines that the rest of this series also touches, but that can't be the only reason to include something in a series.

Fair point. I will drop the patch then.
> I don't hate it, but I think we can do better. In particular, I don't think we need these lookup tables before calling hlsl_sm4_write(), and that means we can just call hlsl_new_sm4_lookup_tables() there, and keep all the lookup table bits local to tpf.c.

I thought on putting the lookup tables in `struct tpf_writer` but then I thought that it may be more futureproof to pass the ctx as argument to all the functions than the writer.
> To put this in the broader picture, we'd ultimately like the HLSL compiler to produce a vkd3d_shader_instruction_array structure, and the TPF writer to consume that structure. Ideally the functions writing TPF then wouldn't have direct knowledge about HLSL IR, and wouldn't get passed a hlsl_ctx structure. It'll probably be a while before we get there, but I think we should at least try to avoid exposing TPF details outside tpf.c. Similarly, we probably want to avoid using hlsl_ctx in TPF writer functions that currently don't need it.

I see. Thanks, I appreciate broader pictures!

I will modify the series to do that then.
> I don't think "lookup" needs to be a pointer here, right?

That was out of necessity, because `struct vkd3d_sm4_lookup_tables` used structs only defined in tpf.c, so it had to be an incomplete type, so I had to use a pointer.

I guess it will no longer be necessary (together with allocation the lookup tables in the heap) if we put in in the ~~parser~~ writer.
> Now that we're no longer accessing register_type_table[] directly, we can make it local to hlsl_new_sm4_lookup_tables().

Okay.
> You can't do that. "register_type"/"sm4_type" is read from the bytecode, which is untrusted input. The existing code is perhaps not great in this regard either, but replacing the existing check with an assert makes it worse.

Okay, I suspected such a thing after sending the series. I will make the lookups to return NULL if they are outside the table.

[Henri Verbeet (＠hverbeet)]

> > I don't think "lookup" needs to be a pointer here, right?
>
> That was out of necessity, because `struct vkd3d_sm4_lookup_tables` used structs only defined in tpf.c, so it had to be an incomplete type, so I had to use a pointer.

For the one in struct hlsl_ctx, sure. The comment was about the one in struct vkd3d_shader_sm4_parser though, which doesn't have that restriction; in fact, the vkd3d_sm4_lookup_tables structure is defined right above it.