You mean that you'd have just `v_s_i` and every frontend and backend deals directly with it, including for very syntactical things like assembling and disassembling? I don't feel really convinced, it seems to me that you'd have to encode su much stuff in `v_s_i` that each time you need to change something (for example to allow for a new language) the changes can have repercussions in each other language frontend or backend.
Yeah, that's the primary concern.
It's mostly at this point weighing that against the idea of introducing new IRs and translation passes for everything, and also writing specific assemblers and disassemblers for everything, that makes me think keeping v_s_i as complex as it is isn't actually that bad.
FWIW, it's not necessarily that everything would go directly into v_s_i (clearly HLSL wouldn't), but sm1 and sm4 at least would. Contrary to what Henri said, I was actually of the impression that sm6 could deal directly with v_s_i without adding too much? Besides new opcodes and interfaces, I thought we didn't need much more than a new "SSA" register type.
-
Zebediah Figura (＠zfigura)