-- v4: vkd3d-shader/dxil: Implement DX intrinsic TextureStore. tests/shader-runner: Add shader model 6 texture UAV tests. tests/shader-runner: Emit descriptor ranges for consecutive resources. vkd3d-shader/dxil: Initialise the register before calling src_param_init_scalar().
From: Conor McCarthy cmccarthy@codeweavers.com
Fixes regression in 1f536238a. --- libs/vkd3d-shader/dxil.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libs/vkd3d-shader/dxil.c b/libs/vkd3d-shader/dxil.c index ba951a6e5..291012d13 100644 --- a/libs/vkd3d-shader/dxil.c +++ b/libs/vkd3d-shader/dxil.c @@ -4725,8 +4725,8 @@ static void sm6_parser_emit_extractval(struct sm6_parser *sm6, const struct dxil vsir_instruction_init(ins, &sm6->p.location, VKD3DSIH_MOV);
src_param = instruction_src_params_alloc(ins, 1, sm6); - src_param_init_scalar(src_param, elem_idx); src_param->reg = src->u.reg; + src_param_init_scalar(src_param, elem_idx);
instruction_dst_param_init_ssa_scalar(ins, sm6); }
From: Conor McCarthy cmccarthy@codeweavers.com
Shader models >= 5.1 support descriptor indexing, and emit arrayed resource declarations. --- tests/hlsl/object-references.shader_test | 2 +- ...egister-reservations-resources.shader_test | 2 +- tests/shader_runner_d3d12.c | 33 ++++++++++++++----- 3 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/tests/hlsl/object-references.shader_test b/tests/hlsl/object-references.shader_test index 5c8070946..698df0117 100644 --- a/tests/hlsl/object-references.shader_test +++ b/tests/hlsl/object-references.shader_test @@ -111,7 +111,7 @@ float4 main() : sv_target }
[test] -todo(sm>=6) draw quad +draw quad probe all rgba (312, 312, 312, 111)
diff --git a/tests/hlsl/register-reservations-resources.shader_test b/tests/hlsl/register-reservations-resources.shader_test index 22a441026..1fa1e9163 100644 --- a/tests/hlsl/register-reservations-resources.shader_test +++ b/tests/hlsl/register-reservations-resources.shader_test @@ -34,7 +34,7 @@ float4 main() : sv_target }
[test] -todo(sm>=6) draw quad +draw quad probe all rgba (41.0, 41.0, 41.0, 1089.0)
diff --git a/tests/shader_runner_d3d12.c b/tests/shader_runner_d3d12.c index c6154cd1e..16cfec1ba 100644 --- a/tests/shader_runner_d3d12.c +++ b/tests/shader_runner_d3d12.c @@ -241,7 +241,9 @@ static ID3D12RootSignature *d3d12_runner_create_root_signature(struct d3d12_shad D3D12_ROOT_SIGNATURE_DESC root_signature_desc = {0}; D3D12_ROOT_PARAMETER root_params[17], *root_param; D3D12_STATIC_SAMPLER_DESC static_samplers[7]; + struct d3d12_resource *base_resource = NULL; ID3D12RootSignature *root_signature; + unsigned int slot; HRESULT hr; size_t i;
@@ -274,6 +276,14 @@ static ID3D12RootSignature *d3d12_runner_create_root_signature(struct d3d12_shad case RESOURCE_TYPE_BUFFER_UAV: range = &resource->descriptor_range;
+ if (base_resource && resource->r.type == base_resource->r.type && resource->r.slot == slot + 1) + { + ++base_resource->descriptor_range.NumDescriptors; + resource->descriptor_range.NumDescriptors = 0; + ++slot; + continue; + } + resource->root_index = root_signature_desc.NumParameters++; root_param = &root_params[resource->root_index]; root_param->ParameterType = D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; @@ -289,6 +299,9 @@ static ID3D12RootSignature *d3d12_runner_create_root_signature(struct d3d12_shad range->BaseShaderRegister = resource->r.slot; range->RegisterSpace = 0; range->OffsetInDescriptorsFromTableStart = 0; + + base_resource = resource; + slot = resource->r.slot; break;
case RESOURCE_TYPE_RENDER_TARGET: @@ -376,14 +389,16 @@ static bool d3d12_runner_dispatch(struct shader_runner *r, unsigned int x, unsig switch (resource->r.type) { case RESOURCE_TYPE_TEXTURE: - ID3D12GraphicsCommandList_SetComputeRootDescriptorTable(command_list, resource->root_index, - get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot)); + if (resource->descriptor_range.NumDescriptors) + ID3D12GraphicsCommandList_SetComputeRootDescriptorTable(command_list, resource->root_index, + get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot)); break;
case RESOURCE_TYPE_UAV: case RESOURCE_TYPE_BUFFER_UAV: - ID3D12GraphicsCommandList_SetComputeRootDescriptorTable(command_list, resource->root_index, - get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot + MAX_RESOURCES)); + if (resource->descriptor_range.NumDescriptors) + ID3D12GraphicsCommandList_SetComputeRootDescriptorTable(command_list, resource->root_index, + get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot + MAX_RESOURCES)); break;
case RESOURCE_TYPE_RENDER_TARGET: @@ -517,14 +532,16 @@ static bool d3d12_runner_draw(struct shader_runner *r, break;
case RESOURCE_TYPE_TEXTURE: - ID3D12GraphicsCommandList_SetGraphicsRootDescriptorTable(command_list, resource->root_index, - get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot)); + if (resource->descriptor_range.NumDescriptors) + ID3D12GraphicsCommandList_SetGraphicsRootDescriptorTable(command_list, resource->root_index, + get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot)); break;
case RESOURCE_TYPE_UAV: case RESOURCE_TYPE_BUFFER_UAV: - ID3D12GraphicsCommandList_SetGraphicsRootDescriptorTable(command_list, resource->root_index, - get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot + MAX_RESOURCES)); + if (resource->descriptor_range.NumDescriptors) + ID3D12GraphicsCommandList_SetGraphicsRootDescriptorTable(command_list, resource->root_index, + get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot + MAX_RESOURCES)); break;
case RESOURCE_TYPE_VERTEX_BUFFER:
From: Conor McCarthy cmccarthy@codeweavers.com
The UAV default register allocation rules changed with SM 5.1. --- Makefile.am | 1 + tests/hlsl/sm6-uav-rwtexture.shader_test | 205 +++++++++++++++++++++++ tests/hlsl/uav-rwtexture.shader_test | 31 ++-- 3 files changed, 224 insertions(+), 13 deletions(-) create mode 100644 tests/hlsl/sm6-uav-rwtexture.shader_test
diff --git a/Makefile.am b/Makefile.am index 90e7dcfcc..20efa5f79 100644 --- a/Makefile.am +++ b/Makefile.am @@ -169,6 +169,7 @@ vkd3d_shader_tests = \ tests/hlsl/sign.shader_test \ tests/hlsl/single-numeric-initializer.shader_test \ tests/hlsl/sm6-ternary.shader_test \ + tests/hlsl/sm6-uav-rwtexture.shader_test \ tests/hlsl/smoothstep.shader_test \ tests/hlsl/sqrt.shader_test \ tests/hlsl/state-block-syntax.shader_test \ diff --git a/tests/hlsl/sm6-uav-rwtexture.shader_test b/tests/hlsl/sm6-uav-rwtexture.shader_test new file mode 100644 index 000000000..7f8b18de7 --- /dev/null +++ b/tests/hlsl/sm6-uav-rwtexture.shader_test @@ -0,0 +1,205 @@ +[require] +shader model >= 6.0 + +[pixel shader] +RWTexture2D<float4> u; + +float4 main() : sv_target +{ + /* Unlike SM < 6.0, all four components are not required to be written in a single statement. */ + u[uint2(0, 0)].xy = float2(1, 2); + u[uint2(0, 0)].zw = float2(3, 4); + return 0; +} + +[pixel shader fail] +Texture2D<float4> u; + +float4 main() : sv_target +{ + /* SRVs are not writable. */ + u[uint2(0, 0)].xyzw = float4(1, 2, 3, 4); + return 0; +} + + +[uav 0] +format r32 float +size (2, 2) + +0.1 0.2 +0.3 0.4 + +[uav 1] +size (1, 1) + +0.5 0.6 0.7 0.8 + +[pixel shader] +RWTexture2D<float> u; +RWTexture2D<float4> v; + +float4 main() : sv_target +{ + u[uint2(0, 0)] = 0.5; + u[uint2(0, 1)].x = 0.6; + u[uint2(1, 1)] = 0.7; + v[uint2(0, 0)].yxwz = float4(1, 2, 3, 4); + return 0; +} + +[test] +todo draw quad +probe uav 0 (0, 0) r (0.5) +probe uav 0 (0, 1) r (0.6) +probe uav 0 (1, 0) r (0.2) +probe uav 0 (1, 1) r (0.7) +probe uav 1 (0, 0) rgba (2.0, 1.0, 4.0, 3.0) + + +[uav 2] +size (1, 1) + +0.1 0.2 0.3 0.4 + +[pixel shader] +RWTexture2D<float4> u : register(u2); + +float4 main() : sv_target1 +{ + u[uint2(0, 0)] = float4(0.9, 0.8, 0.7, 0.6); + return 0; +} + +[test] +todo draw quad +probe uav 2 (0, 0) rgba (0.9, 0.8, 0.7, 0.6) + +% Uppercase register set name +[pixel shader] +RWTexture2D<float4> u : register(U2); + +float4 main() : sv_target1 +{ + u[uint2(0, 0)] = float4(0.9, 0.8, 0.7, 0.6); + return 0; +} + +[test] +todo draw quad +probe uav 2 (0, 0) rgba (0.9, 0.8, 0.7, 0.6) + +% Test that we can declare and use an array of UAVs. + +[uav 1] +size (1, 1) + +0.1 0.2 0.3 0.4 + +[uav 2] +size (1, 1) + +0.5 0.6 0.7 0.8 + +[pixel shader] +RWTexture2D<float4> u[2] : register(u1); + +float4 main() : sv_target1 +{ + u[0][uint2(0, 0)] = float4(1.1, 1.2, 1.3, 1.4); + u[1][uint2(0, 0)] = float4(2.1, 2.2, 2.3, 2.4); + return 0; +} + +[test] +todo draw quad +probe uav 1 (0, 0) rgba (1.1, 1.2, 1.3, 1.4) +probe uav 2 (0, 0) rgba (2.1, 2.2, 2.3, 2.4) + +% RWTexture1D types +[pixel shader] + +RWTexture1D<float4> u : register(u1); +RWTexture1D<float> u0; + +float4 main() : sv_target1 +{ + u[0] = float4(11.1, 12.2, 13.3, 14.4); + return 0; +} + +% RWTexture1DArray types +[pixel shader] + +RWTexture1DArray<float4> u : register(u1); +RWTexture1DArray<float> u0; + +float4 main() : sv_target1 +{ + u[int2(0, 0)] = float4(11.1, 12.2, 13.3, 14.4); + return 0; +} + +% RWTexture2D types +[pixel shader] + +RWTexture2D<float4> u : register(u1); +RWTexture2D<float> u0; + +float4 main() : sv_target1 +{ + u[int2(0, 0)] = float4(11.1, 12.2, 13.3, 14.4); + return 0; +} + +% RWTexture2DArray types +[pixel shader] + +RWTexture2DArray<float4> u : register(u1); +RWTexture2DArray<float> u0; + +float4 main() : sv_target1 +{ + u[int3(0, 0, 0)] = float4(11.1, 12.2, 13.3, 14.4); + return 0; +} + +% RWTexture3D types +[pixel shader] + +RWTexture3D<float4> u : register(u1); +RWTexture3D<float> u0; + +float4 main() : sv_target1 +{ + u[int3(0, 0, 0)] = float4(11.1, 12.2, 13.3, 14.4); + return 0; +} + +% Structs are invalid in SM 6. +[pixel shader fail] +struct s +{ + float4 a; +}; + +RWTexture2D<float4> u : register(u1); +RWTexture2D<struct s> u0; + +float4 main() : sv_target1 +{ + u[int2(0, 0)] = float4(11.1, 12.2, 13.3, 14.4); + return 0; +} + +% Matrices are invalid in SM 6. +[pixel shader fail] + +RWTexture2D<float4> u : register(u1); +RWTexture2D<float2x2> u0; + +float4 main() : sv_target1 +{ + u[int2(0, 0)] = float4(11.1, 12.2, 13.3, 14.4); + return 0; +} diff --git a/tests/hlsl/uav-rwtexture.shader_test b/tests/hlsl/uav-rwtexture.shader_test index 76535bd59..5cfd969f0 100644 --- a/tests/hlsl/uav-rwtexture.shader_test +++ b/tests/hlsl/uav-rwtexture.shader_test @@ -1,7 +1,8 @@ [require] shader model >= 5.0 +shader model < 6.0
-[pixel shader fail(sm<6)] +[pixel shader fail] RWTexture2D<float4> u;
float4 main() : sv_target @@ -49,7 +50,7 @@ float4 main() : sv_target }
[test] -todo(sm>=6) draw quad +draw quad probe uav 1 (0, 0) r (0.5) probe uav 1 (0, 1) r (0.6) probe uav 1 (1, 0) r (0.2) @@ -71,7 +72,7 @@ size (1, 1)
0.1 0.2 0.3 0.4
-[pixel shader fail(sm<6)] +[pixel shader fail] RWTexture2D<float4> u : register(u0);
float4 main() : sv_target1 @@ -80,7 +81,7 @@ float4 main() : sv_target1 return 0; }
-[pixel shader fail(sm<6)] +[pixel shader fail] RWTexture2D<float4> u : register(u1);
float4 main() : sv_target1 @@ -99,7 +100,7 @@ float4 main() : sv_target1 }
[test] -todo(sm>=6) draw quad +draw quad probe uav 2 (0, 0) rgba (0.9, 0.8, 0.7, 0.6)
@@ -118,7 +119,7 @@ float4 main() : sv_target1 }
[test] -todo(sm>=6) draw quad +draw quad probe uav 3 (0, 0) rgba (0.9, 0.8, 0.7, 0.6)
% Uppercase register set name @@ -132,7 +133,7 @@ float4 main() : sv_target1 }
[test] -todo(sm>=6) draw quad +draw quad probe uav 3 (0, 0) rgba (0.9, 0.8, 0.7, 0.6)
% Test that we can declare and use an array of UAVs. @@ -158,12 +159,12 @@ float4 main() : sv_target1 }
[test] -todo(sm>=6) draw quad +draw quad probe uav 2 (0, 0) rgba (1.1, 1.2, 1.3, 1.4) probe uav 3 (0, 0) rgba (2.1, 2.2, 2.3, 2.4)
% RWTexture1D types -[pixel shader fail(sm>=6)] +[pixel shader] struct s { float3 a; @@ -181,7 +182,7 @@ float4 main() : sv_target1 }
% RWTexture1DArray types -[pixel shader fail(sm>=6)] +[pixel shader] struct s { float3 a; @@ -199,7 +200,7 @@ float4 main() : sv_target1 }
% RWTexture2D types -[pixel shader fail(sm>=6)] +[pixel shader] struct s { float3 a; @@ -217,7 +218,7 @@ float4 main() : sv_target1 }
% RWTexture2DArray types -[pixel shader fail(sm>=6)] +[pixel shader] struct s { float3 a; @@ -235,7 +236,7 @@ float4 main() : sv_target1 }
% RWTexture3D types -[pixel shader fail(sm>=6)] +[pixel shader] struct s { float3 a; @@ -252,6 +253,10 @@ float4 main() : sv_target1 return 0; }
+ +[require] +shader model >= 5.0 + % Type is too wide [pixel shader fail] struct s
From: Conor McCarthy cmccarthy@codeweavers.com
--- libs/vkd3d-shader/dxil.c | 124 +++++++++++++++++++---- tests/hlsl/compute.shader_test | 2 +- tests/hlsl/sm6-uav-rwtexture.shader_test | 8 +- tests/hlsl/uav-load.shader_test | 2 +- tests/hlsl/uav-out-param.shader_test | 4 +- 5 files changed, 111 insertions(+), 29 deletions(-)
diff --git a/libs/vkd3d-shader/dxil.c b/libs/vkd3d-shader/dxil.c index 291012d13..ef52855da 100644 --- a/libs/vkd3d-shader/dxil.c +++ b/libs/vkd3d-shader/dxil.c @@ -364,6 +364,7 @@ enum dx_intrinsic_opcode DX_CREATE_HANDLE = 57, DX_CBUFFER_LOAD_LEGACY = 59, DX_TEXTURE_LOAD = 66, + DX_TEXTURE_STORE = 67, DX_BUFFER_LOAD = 68, DX_DERIV_COARSEX = 83, DX_DERIV_COARSEY = 84, @@ -2200,6 +2201,13 @@ static void dst_param_init(struct vkd3d_shader_dst_param *param) param->shift = 0; }
+static void dst_param_init_with_mask(struct vkd3d_shader_dst_param *param, unsigned int mask) +{ + param->write_mask = mask; + param->modifiers = 0; + param->shift = 0; +} + static inline void dst_param_init_scalar(struct vkd3d_shader_dst_param *param, unsigned int component_idx) { param->write_mask = 1u << component_idx; @@ -3547,47 +3555,36 @@ static void sm6_parser_emit_br(struct sm6_parser *sm6, const struct dxil_record ins->handler_idx = VKD3DSIH_NOP; }
-static bool sm6_parser_emit_coordinate_construct(struct sm6_parser *sm6, const struct sm6_value **operands, - const struct sm6_value *z_operand, struct function_emission_state *state, - struct vkd3d_shader_register *reg) +static bool sm6_parser_emit_reg_composite_construct(struct sm6_parser *sm6, const struct vkd3d_shader_register **operand_regs, + unsigned int component_count, struct function_emission_state *state, struct vkd3d_shader_register *reg) { - const struct vkd3d_shader_register *operand_regs[VKD3D_VEC4_SIZE]; struct vkd3d_shader_instruction *ins = state->ins; struct vkd3d_shader_src_param *src_params; struct vkd3d_shader_dst_param *dst_param; - const unsigned int max_operands = 3; - unsigned int i, component_count; bool all_constant = true; - - for (component_count = 0; component_count < max_operands; ++component_count) - { - if (!z_operand && operands[component_count]->is_undefined) - break; - operand_regs[component_count] = &operands[component_count]->u.reg; - all_constant &= register_is_constant_or_undef(operand_regs[component_count]); - } - if (z_operand) - { - all_constant &= register_is_constant(&z_operand->u.reg); - operand_regs[component_count++] = &z_operand->u.reg; - } + unsigned int i;
if (component_count == 1) { - *reg = operands[0]->u.reg; + *reg = *operand_regs[0]; return true; }
+ for (i = 0; i < component_count; ++i) + all_constant &= register_is_constant(operand_regs[i]); + if (all_constant) { vsir_register_init(reg, VKD3DSPR_IMMCONST, operand_regs[0]->data_type, 0); reg->dimension = VSIR_DIMENSION_VEC4; for (i = 0; i < component_count; ++i) reg->u.immconst_u32[i] = operand_regs[i]->u.immconst_u32[0]; + for (; i < VKD3D_VEC4_SIZE; ++i) + reg->u.immconst_u32[i] = 0; return true; }
- register_init_with_id(reg, VKD3DSPR_TEMP, operands[0]->u.reg.data_type, state->temp_idx++); + register_init_with_id(reg, VKD3DSPR_TEMP, operand_regs[0]->data_type, state->temp_idx++); reg->dimension = VSIR_DIMENSION_VEC4;
for (i = 0; i < component_count; ++i, ++ins) @@ -3613,6 +3610,40 @@ static bool sm6_parser_emit_coordinate_construct(struct sm6_parser *sm6, const s return true; }
+static bool sm6_parser_emit_composite_construct(struct sm6_parser *sm6, const struct sm6_value **operands, + unsigned int component_count, struct function_emission_state *state, struct vkd3d_shader_register *reg) +{ + const struct vkd3d_shader_register *operand_regs[VKD3D_VEC4_SIZE]; + unsigned int i; + + for (i = 0; i < component_count; ++i) + operand_regs[i] = &operands[i]->u.reg; + + return sm6_parser_emit_reg_composite_construct(sm6, operand_regs, component_count, state, reg); +} + +static bool sm6_parser_emit_coordinate_construct(struct sm6_parser *sm6, const struct sm6_value **operands, + const struct sm6_value *z_operand, struct function_emission_state *state, + struct vkd3d_shader_register *reg) +{ + const struct vkd3d_shader_register *operand_regs[VKD3D_VEC4_SIZE]; + const unsigned int max_operands = 3; + unsigned int component_count; + + for (component_count = 0; component_count < max_operands; ++component_count) + { + if (!z_operand && operands[component_count]->is_undefined) + break; + operand_regs[component_count] = &operands[component_count]->u.reg; + } + if (z_operand) + { + operand_regs[component_count++] = &z_operand->u.reg; + } + + return sm6_parser_emit_reg_composite_construct(sm6, operand_regs, component_count, state, reg); +} + static enum vkd3d_shader_opcode map_dx_unary_op(enum dx_intrinsic_opcode op) { switch (op) @@ -4099,6 +4130,56 @@ static void sm6_parser_emit_dx_texture_load(struct sm6_parser *sm6, enum dx_intr instruction_dst_param_init_ssa_vector(ins, VKD3D_VEC4_SIZE, sm6); }
+static void sm6_parser_emit_dx_texture_store(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, + const struct sm6_value **operands, struct function_emission_state *state) +{ + struct vkd3d_shader_register coord, texel; + struct vkd3d_shader_src_param *src_params; + struct vkd3d_shader_dst_param *dst_param; + unsigned int write_mask, component_count; + struct vkd3d_shader_instruction *ins; + const struct sm6_value *resource; + + resource = operands[0]; + if (!sm6_value_validate_is_texture_handle(resource, op, sm6)) + return; + + if (!sm6_parser_emit_coordinate_construct(sm6, &operands[1], NULL, state, &coord)) + return; + + write_mask = sm6_value_get_constant_uint(operands[8]); + if (!write_mask || write_mask > VKD3DSP_WRITEMASK_ALL) + { + WARN("Invalid write mask %#x.\n", write_mask); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND, + "Write mask %#x for a texture store operation is invalid.", write_mask); + return; + } + else if (write_mask & (write_mask + 1)) + { + /* In this case, it is unclear which source operands will be defined unless we encounter it in a shader. */ + FIXME("Unhandled write mask %#x.\n", write_mask); + vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_INVALID_OPERAND, + "Write mask %#x for a texture store operation is unhandled.", write_mask); + } + component_count = vsir_write_mask_component_count(write_mask); + + if (!sm6_parser_emit_composite_construct(sm6, &operands[4], component_count, state, &texel)) + return; + + ins = state->ins; + vsir_instruction_init(ins, &sm6->p.location, VKD3DSIH_STORE_UAV_TYPED); + + if (!(src_params = instruction_src_params_alloc(ins, 2, sm6))) + return; + src_param_init_vector_from_reg(&src_params[0], &coord); + src_param_init_vector_from_reg(&src_params[1], &texel); + + dst_param = instruction_dst_params_alloc(ins, 1, sm6); + dst_param->reg = resource->u.handle.reg; + dst_param_init_with_mask(dst_param, write_mask); +} + struct sm6_dx_opcode_info { const char *ret_type; @@ -4166,6 +4247,7 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] = [DX_STORE_OUTPUT ] = {"v", "ii8o", sm6_parser_emit_dx_store_output}, [DX_TAN ] = {"g", "R", sm6_parser_emit_dx_unary}, [DX_TEXTURE_LOAD ] = {"o", "HiiiiCCC", sm6_parser_emit_dx_texture_load}, + [DX_TEXTURE_STORE ] = {"v", "Hiiiooooc", sm6_parser_emit_dx_texture_store}, [DX_UBFE ] = {"m", "iiR", sm6_parser_emit_dx_tertiary}, [DX_UMAX ] = {"m", "RR", sm6_parser_emit_dx_binary}, [DX_UMIN ] = {"m", "RR", sm6_parser_emit_dx_binary}, diff --git a/tests/hlsl/compute.shader_test b/tests/hlsl/compute.shader_test index 2f2af9fc8..6d2f698c7 100644 --- a/tests/hlsl/compute.shader_test +++ b/tests/hlsl/compute.shader_test @@ -17,5 +17,5 @@ void main() }
[test] -todo(sm>=6) dispatch 1 1 1 +dispatch 1 1 1 probe uav 0 (0, 0) r (-123.0) diff --git a/tests/hlsl/sm6-uav-rwtexture.shader_test b/tests/hlsl/sm6-uav-rwtexture.shader_test index 7f8b18de7..4d4e9403c 100644 --- a/tests/hlsl/sm6-uav-rwtexture.shader_test +++ b/tests/hlsl/sm6-uav-rwtexture.shader_test @@ -49,7 +49,7 @@ float4 main() : sv_target }
[test] -todo draw quad +draw quad probe uav 0 (0, 0) r (0.5) probe uav 0 (0, 1) r (0.6) probe uav 0 (1, 0) r (0.2) @@ -72,7 +72,7 @@ float4 main() : sv_target1 }
[test] -todo draw quad +draw quad probe uav 2 (0, 0) rgba (0.9, 0.8, 0.7, 0.6)
% Uppercase register set name @@ -86,7 +86,7 @@ float4 main() : sv_target1 }
[test] -todo draw quad +draw quad probe uav 2 (0, 0) rgba (0.9, 0.8, 0.7, 0.6)
% Test that we can declare and use an array of UAVs. @@ -112,7 +112,7 @@ float4 main() : sv_target1 }
[test] -todo draw quad +draw quad probe uav 1 (0, 0) rgba (1.1, 1.2, 1.3, 1.4) probe uav 2 (0, 0) rgba (2.1, 2.2, 2.3, 2.4)
diff --git a/tests/hlsl/uav-load.shader_test b/tests/hlsl/uav-load.shader_test index 9088ffa0d..fe6350e0c 100644 --- a/tests/hlsl/uav-load.shader_test +++ b/tests/hlsl/uav-load.shader_test @@ -23,7 +23,7 @@ void main() }
[test] -todo(sm>=6) dispatch 1 1 1 +dispatch 1 1 1 probe uav 0 (0, 0) r (0.6) probe uav 0 (1, 0) r (0.6) probe uav 0 (2, 0) r (0.6) diff --git a/tests/hlsl/uav-out-param.shader_test b/tests/hlsl/uav-out-param.shader_test index 796c4bf1f..f31344748 100644 --- a/tests/hlsl/uav-out-param.shader_test +++ b/tests/hlsl/uav-out-param.shader_test @@ -26,7 +26,7 @@ void main() }
[test] -todo(sm>=6) dispatch 1 1 1 +dispatch 1 1 1 probe uav 0 (0, 0) rgba (0.4, 0.1, 0.2, 0.3)
[uav 0] @@ -51,5 +51,5 @@ void main() }
[test] -todo(sm>=6) dispatch 1 1 1 +dispatch 1 1 1 probe uav 0 (0, 0) r (0.2)
Giovanni Mascellani (@giomasce) commented about tests/hlsl/object-references.shader_test:
}
[test] -todo(sm>=6) draw quad +draw quad
Maybe I am missing something, but isn't this just masking a problem? This test works on native D3D12, even if descriptors are in separated ranges and tables, so it should work with vkd3d too.
Giovanni Mascellani (@giomasce) commented about tests/hlsl/sm6-uav-rwtexture.shader_test:
+[require] +shader model >= 6.0
+[pixel shader] +RWTexture2D<float4> u;
+float4 main() : sv_target +{
- /* Unlike SM < 6.0, all four components are not required to be written in a single statement. */
- u[uint2(0, 0)].xy = float2(1, 2);
- u[uint2(0, 0)].zw = float2(3, 4);
Could you actually run this, to check that it behaves as expected? In principle it might be, for instance, that components that are not written are given zero or undefined values.
On Tue Feb 6 11:52:54 2024 +0000, Giovanni Mascellani wrote:
Maybe I am missing something, but isn't this just masking a problem? This test works on native D3D12, even if descriptors are in separated ranges and tables, so it should work with vkd3d too.
Did it run the tests with dxcompiler? It will only fail on SM 6 because we don't test 5.1.